Search

Daniel D. Chang

Examiner (ID: 461, Phone: (571)272-1801 , Office: P/2844 )

Most Active Art Unit
2844
Art Unit(s)
2845, 2819, 2844, 0
Total Applications
2565
Issued Applications
2341
Pending Applications
103
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1094260 [patent_doc_number] => 06825694 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-30 [patent_title] => 'Flip-flop circuit for use in electronic devices' [patent_app_type] => B2 [patent_app_number] => 10/255468 [patent_app_country] => US [patent_app_date] => 2002-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2913 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/825/06825694.pdf [firstpage_image] =>[orig_patent_app_number] => 10255468 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/255468
Flip-flop circuit for use in electronic devices Sep 25, 2002 Issued
Array ( [id] => 1151825 [patent_doc_number] => 06774677 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-10 [patent_title] => 'Device for linking a processor to a memory element and memory element' [patent_app_type] => B2 [patent_app_number] => 10/252946 [patent_app_country] => US [patent_app_date] => 2002-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2733 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/774/06774677.pdf [firstpage_image] =>[orig_patent_app_number] => 10252946 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/252946
Device for linking a processor to a memory element and memory element Sep 22, 2002 Issued
Array ( [id] => 7626422 [patent_doc_number] => 06768341 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-27 [patent_title] => 'Synchronizing interface device for computer facilities' [patent_app_type] => B2 [patent_app_number] => 10/253167 [patent_app_country] => US [patent_app_date] => 2002-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1819 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/768/06768341.pdf [firstpage_image] =>[orig_patent_app_number] => 10253167 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/253167
Synchronizing interface device for computer facilities Sep 19, 2002 Issued
Array ( [id] => 752581 [patent_doc_number] => 07023242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-04 [patent_title] => 'Method and circuit configuration for adapting the voltage level for the transmission of data' [patent_app_type] => utility [patent_app_number] => 10/490578 [patent_app_country] => US [patent_app_date] => 2002-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5968 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/023/07023242.pdf [firstpage_image] =>[orig_patent_app_number] => 10490578 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/490578
Method and circuit configuration for adapting the voltage level for the transmission of data Sep 19, 2002 Issued
Array ( [id] => 1237611 [patent_doc_number] => 06690199 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-10 [patent_title] => 'Methods and systems for providing load-adaptive output current drive' [patent_app_type] => B2 [patent_app_number] => 10/245273 [patent_app_country] => US [patent_app_date] => 2002-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6113 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/690/06690199.pdf [firstpage_image] =>[orig_patent_app_number] => 10245273 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/245273
Methods and systems for providing load-adaptive output current drive Sep 17, 2002 Issued
Array ( [id] => 6728153 [patent_doc_number] => 20030184343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Interface circuit and semiconductor device with the same' [patent_app_type] => new [patent_app_number] => 10/245671 [patent_app_country] => US [patent_app_date] => 2002-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 21779 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20030184343.pdf [firstpage_image] =>[orig_patent_app_number] => 10245671 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/245671
Interface circuit and semiconductor device with the same Sep 17, 2002 Issued
Array ( [id] => 1159842 [patent_doc_number] => 06765414 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-20 [patent_title] => 'Low frequency testing, leakage control, and burn-in control for high-performance digital circuits' [patent_app_type] => B2 [patent_app_number] => 10/246377 [patent_app_country] => US [patent_app_date] => 2002-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 2523 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/765/06765414.pdf [firstpage_image] =>[orig_patent_app_number] => 10246377 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/246377
Low frequency testing, leakage control, and burn-in control for high-performance digital circuits Sep 16, 2002 Issued
Array ( [id] => 7344198 [patent_doc_number] => 20040046588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-11 [patent_title] => 'Global chip interconnect' [patent_app_type] => new [patent_app_number] => 10/242165 [patent_app_country] => US [patent_app_date] => 2002-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2534 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20040046588.pdf [firstpage_image] =>[orig_patent_app_number] => 10242165 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/242165
Global chip interconnect Sep 10, 2002 Issued
Array ( [id] => 7629220 [patent_doc_number] => 06819137 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-16 [patent_title] => 'Technique for voltage level shifting in input circuitry' [patent_app_type] => B1 [patent_app_number] => 10/237963 [patent_app_country] => US [patent_app_date] => 2002-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 4848 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 9 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/819/06819137.pdf [firstpage_image] =>[orig_patent_app_number] => 10237963 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/237963
Technique for voltage level shifting in input circuitry Sep 9, 2002 Issued
Array ( [id] => 7130559 [patent_doc_number] => 20040041588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'CLOCKED HALF-RAIL DIFFERENTIAL LOGIC WITH SINGLE-RAIL LOGIC' [patent_app_type] => new [patent_app_number] => 10/231549 [patent_app_country] => US [patent_app_date] => 2002-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6485 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20040041588.pdf [firstpage_image] =>[orig_patent_app_number] => 10231549 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/231549
Clocked half-rail differential logic with single-rail logic Aug 29, 2002 Issued
Array ( [id] => 7063501 [patent_doc_number] => 20050005216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-06 [patent_title] => 'Electronic component' [patent_app_type] => utility [patent_app_number] => 10/490572 [patent_app_country] => US [patent_app_date] => 2002-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3948 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20050005216.pdf [firstpage_image] =>[orig_patent_app_number] => 10490572 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/490572
Electronic component Aug 29, 2002 Abandoned
Array ( [id] => 7130553 [patent_doc_number] => 20040041582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Selective cooling of an integrated circuit for minimizing power loss' [patent_app_type] => new [patent_app_number] => 10/230466 [patent_app_country] => US [patent_app_date] => 2002-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2185 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20040041582.pdf [firstpage_image] =>[orig_patent_app_number] => 10230466 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/230466
Selective cooling of an integrated circuit for minimizing power loss Aug 28, 2002 Issued
Array ( [id] => 1002970 [patent_doc_number] => 06909308 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-21 [patent_title] => 'Increasing drive strength and reducing propagation delays through the use of feedback' [patent_app_type] => utility [patent_app_number] => 10/228172 [patent_app_country] => US [patent_app_date] => 2002-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8889 [patent_no_of_claims] => 58 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/909/06909308.pdf [firstpage_image] =>[orig_patent_app_number] => 10228172 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/228172
Increasing drive strength and reducing propagation delays through the use of feedback Aug 25, 2002 Issued
Array ( [id] => 465851 [patent_doc_number] => 07239169 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-03 [patent_title] => 'Semiconductor apparatus capable of preventing occurrence of multiple reflection, driving method, and setting method thereof' [patent_app_type] => utility [patent_app_number] => 10/226777 [patent_app_country] => US [patent_app_date] => 2002-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 4356 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/239/07239169.pdf [firstpage_image] =>[orig_patent_app_number] => 10226777 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/226777
Semiconductor apparatus capable of preventing occurrence of multiple reflection, driving method, and setting method thereof Aug 22, 2002 Issued
Array ( [id] => 1183922 [patent_doc_number] => 06737889 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-18 [patent_title] => 'Method for increasing the power efficiency and noise immunity of clocked full-rail differential logic' [patent_app_type] => B2 [patent_app_number] => 10/226609 [patent_app_country] => US [patent_app_date] => 2002-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6273 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 589 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/737/06737889.pdf [firstpage_image] =>[orig_patent_app_number] => 10226609 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/226609
Method for increasing the power efficiency and noise immunity of clocked full-rail differential logic Aug 22, 2002 Issued
Array ( [id] => 7630862 [patent_doc_number] => 06636070 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-21 [patent_title] => 'Driver circuitry for programmable logic devices with hierarchical interconnection resources' [patent_app_type] => B1 [patent_app_number] => 10/223204 [patent_app_country] => US [patent_app_date] => 2002-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9323 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/636/06636070.pdf [firstpage_image] =>[orig_patent_app_number] => 10223204 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/223204
Driver circuitry for programmable logic devices with hierarchical interconnection resources Aug 14, 2002 Issued
Array ( [id] => 1179534 [patent_doc_number] => 06747477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-08 [patent_title] => 'Programmable data device and method therefor' [patent_app_type] => B2 [patent_app_number] => 10/217661 [patent_app_country] => US [patent_app_date] => 2002-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4655 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/747/06747477.pdf [firstpage_image] =>[orig_patent_app_number] => 10217661 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/217661
Programmable data device and method therefor Aug 12, 2002 Issued
Array ( [id] => 7370901 [patent_doc_number] => 20040027168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'Method for increasing the load capacity of clocked half-rail differential logic' [patent_app_type] => new [patent_app_number] => 10/217723 [patent_app_country] => US [patent_app_date] => 2002-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7891 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20040027168.pdf [firstpage_image] =>[orig_patent_app_number] => 10217723 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/217723
Method for increasing the load capacity of clocked half-rail differential logic Aug 11, 2002 Issued
Array ( [id] => 7370880 [patent_doc_number] => 20040027164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'Clocked half-rail differential logic with sense amplifier' [patent_app_type] => new [patent_app_number] => 10/217724 [patent_app_country] => US [patent_app_date] => 2002-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7891 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20040027164.pdf [firstpage_image] =>[orig_patent_app_number] => 10217724 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/217724
Clocked half-rail differential logic with sense amplifier Aug 11, 2002 Issued
Array ( [id] => 1106768 [patent_doc_number] => 06812733 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-02 [patent_title] => 'High-efficiency mixed voltage/current mode output driver' [patent_app_type] => B1 [patent_app_number] => 10/210076 [patent_app_country] => US [patent_app_date] => 2002-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2991 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/812/06812733.pdf [firstpage_image] =>[orig_patent_app_number] => 10210076 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/210076
High-efficiency mixed voltage/current mode output driver Aug 1, 2002 Issued
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