
Daniel D. Chang
Examiner (ID: 461, Phone: (571)272-1801 , Office: P/2844 )
| Most Active Art Unit | 2844 |
| Art Unit(s) | 2845, 2819, 2844, 0 |
| Total Applications | 2565 |
| Issued Applications | 2341 |
| Pending Applications | 103 |
| Abandoned Applications | 143 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3946408
[patent_doc_number] => 05973513
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-26
[patent_title] => 'Integrated circuit arrangement with an open-collector transistor designed as npn transistor'
[patent_app_type] => 1
[patent_app_number] => 8/852473
[patent_app_country] => US
[patent_app_date] => 1997-05-07
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[pdf_file] => patents/05/973/05973513.pdf
[firstpage_image] =>[orig_patent_app_number] => 852473
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/852473 | Integrated circuit arrangement with an open-collector transistor designed as npn transistor | May 6, 1997 | Issued |
Array
(
[id] => 3974710
[patent_doc_number] => 05886537
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-23
[patent_title] => 'Self-reconfigurable parallel processor made from regularly-connected self-dual code/data processing cells'
[patent_app_type] => 1
[patent_app_number] => 8/850472
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/850472 | Self-reconfigurable parallel processor made from regularly-connected self-dual code/data processing cells | May 4, 1997 | Issued |
Array
(
[id] => 4005327
[patent_doc_number] => 05986479
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-16
[patent_title] => 'Fully switched, class-B, high speed current amplifier driver'
[patent_app_type] => 1
[patent_app_number] => 8/841813
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[pdf_file] => patents/05/986/05986479.pdf
[firstpage_image] =>[orig_patent_app_number] => 841813
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/841813 | Fully switched, class-B, high speed current amplifier driver | May 4, 1997 | Issued |
Array
(
[id] => 3803716
[patent_doc_number] => 05828229
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-27
[patent_title] => 'Programmable logic array integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 8/847004
[patent_app_country] => US
[patent_app_date] => 1997-05-01
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 847004
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/847004 | Programmable logic array integrated circuits | Apr 30, 1997 | Issued |
Array
(
[id] => 4015065
[patent_doc_number] => 05889414
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[patent_kind] => NA
[patent_issue_date] => 1999-03-30
[patent_title] => 'Programmable circuits'
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Array
(
[id] => 4050002
[patent_doc_number] => 05874837
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[patent_kind] => NA
[patent_issue_date] => 1999-02-23
[patent_title] => 'CMOS PECL driver with programmable current for varying voltage swings and termination types'
[patent_app_type] => 1
[patent_app_number] => 8/847819
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/847819 | CMOS PECL driver with programmable current for varying voltage swings and termination types | Apr 27, 1997 | Issued |
Array
(
[id] => 4059080
[patent_doc_number] => 05933029
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-03
[patent_title] => 'Semiconductor integrated circuit device comprising a bias circuit, a driver circuit, and a receiver circuit'
[patent_app_type] => 1
[patent_app_number] => 8/848126
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 848126
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/848126 | Semiconductor integrated circuit device comprising a bias circuit, a driver circuit, and a receiver circuit | Apr 27, 1997 | Issued |
Array
(
[id] => 3941004
[patent_doc_number] => 05939899
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-17
[patent_title] => 'MOSFET substrate current logic'
[patent_app_type] => 1
[patent_app_number] => 8/842123
[patent_app_country] => US
[patent_app_date] => 1997-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[firstpage_image] =>[orig_patent_app_number] => 842123
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/842123 | MOSFET substrate current logic | Apr 22, 1997 | Issued |
Array
(
[id] => 3982296
[patent_doc_number] => 05917335
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-29
[patent_title] => 'Output voltage controlled impedance output buffer'
[patent_app_type] => 1
[patent_app_number] => 8/837782
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[firstpage_image] =>[orig_patent_app_number] => 837782
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/837782 | Output voltage controlled impedance output buffer | Apr 21, 1997 | Issued |
Array
(
[id] => 3950252
[patent_doc_number] => 05982196
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-09
[patent_title] => 'Programmable logic device producing a complementary bit line signal'
[patent_app_type] => 1
[patent_app_number] => 8/847739
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[pdf_file] => patents/05/982/05982196.pdf
[firstpage_image] =>[orig_patent_app_number] => 847739
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/847739 | Programmable logic device producing a complementary bit line signal | Apr 21, 1997 | Issued |
Array
(
[id] => 4032370
[patent_doc_number] => 05883526
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-16
[patent_title] => 'Hierarchical interconnect for programmable logic devices'
[patent_app_type] => 1
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[pdf_file] => patents/05/883/05883526.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/840113 | Hierarchical interconnect for programmable logic devices | Apr 16, 1997 | Issued |
Array
(
[id] => 4032411
[patent_doc_number] => 05883529
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-16
[patent_title] => 'Function clock generation circuit and D-type flip-flop equipped with enable function and memory circuit using same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/834146 | Function clock generation circuit and D-type flip-flop equipped with enable function and memory circuit using same | Apr 13, 1997 | Issued |
Array
(
[id] => 3974736
[patent_doc_number] => 05886539
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[patent_issue_date] => 1999-03-23
[patent_title] => 'Communication within an integrated circuit by data serialization through a metal plane'
[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/835935 | Communication within an integrated circuit by data serialization through a metal plane | Apr 9, 1997 | Issued |
Array
(
[id] => 3986883
[patent_doc_number] => 05949249
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[patent_issue_date] => 1999-09-07
[patent_title] => 'Driver having inductance-controlled current slew rate'
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Array
(
[id] => 4000579
[patent_doc_number] => 05920202
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Array
(
[id] => 4205024
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Array
(
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/804193 | Unidirectional field antenna for identification system | Feb 20, 1997 | Issued |
Array
(
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[pdf_file] => patents/05/990/05990848.pdf
[firstpage_image] =>[orig_patent_app_number] => 801884
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/801884 | Combined structure of a helical antenna and a dielectric plate | Feb 17, 1997 | Issued |