Search

Daniel D. Chang

Examiner (ID: 461, Phone: (571)272-1801 , Office: P/2844 )

Most Active Art Unit
2844
Art Unit(s)
2845, 2819, 2844, 0
Total Applications
2565
Issued Applications
2341
Pending Applications
103
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6467553 [patent_doc_number] => 20100007374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-14 [patent_title] => 'ON-DIE THEVENIN TERMINATION FOR HIGH SPEED I/O INTERFACE' [patent_app_type] => utility [patent_app_number] => 12/172282 [patent_app_country] => US [patent_app_date] => 2008-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7357 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20100007374.pdf [firstpage_image] =>[orig_patent_app_number] => 12172282 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/172282
ON-DIE THEVENIN TERMINATION FOR HIGH SPEED I/O INTERFACE Jul 13, 2008 Abandoned
Array ( [id] => 7742317 [patent_doc_number] => 08106680 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-01-31 [patent_title] => 'Programmable logic device with a self-power down mechanism' [patent_app_type] => utility [patent_app_number] => 12/172054 [patent_app_country] => US [patent_app_date] => 2008-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 4694 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/106/08106680.pdf [firstpage_image] =>[orig_patent_app_number] => 12172054 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/172054
Programmable logic device with a self-power down mechanism Jul 10, 2008 Issued
Array ( [id] => 113153 [patent_doc_number] => 07719307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-18 [patent_title] => 'Data output driving circuit of semiconductor apparatus' [patent_app_type] => utility [patent_app_number] => 12/172128 [patent_app_country] => US [patent_app_date] => 2008-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 6865 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/719/07719307.pdf [firstpage_image] =>[orig_patent_app_number] => 12172128 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/172128
Data output driving circuit of semiconductor apparatus Jul 10, 2008 Issued
Array ( [id] => 4884470 [patent_doc_number] => 20080258802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'ADJUSTABLE TRANSISTOR BODY BIAS CIRCUITRY' [patent_app_type] => utility [patent_app_number] => 12/163695 [patent_app_country] => US [patent_app_date] => 2008-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6324 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20080258802.pdf [firstpage_image] =>[orig_patent_app_number] => 12163695 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/163695
Adjustable transistor body bias circuitry Jun 26, 2008 Issued
Array ( [id] => 4757205 [patent_doc_number] => 20080309430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-18 [patent_title] => 'LOW-LOSS TUNABLE RADIO FREQUENCY FILTER' [patent_app_type] => utility [patent_app_number] => 12/163814 [patent_app_country] => US [patent_app_date] => 2008-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 53 [patent_no_of_words] => 10796 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0309/20080309430.pdf [firstpage_image] =>[orig_patent_app_number] => 12163814 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/163814
Low-loss tunable radio frequency filter Jun 26, 2008 Issued
Array ( [id] => 4661428 [patent_doc_number] => 20080252335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'ROBUST AND ECONOMIC SOLUTION FOR FPGA BITFILE UPGRADE' [patent_app_type] => utility [patent_app_number] => 12/144493 [patent_app_country] => US [patent_app_date] => 2008-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4084 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0252/20080252335.pdf [firstpage_image] =>[orig_patent_app_number] => 12144493 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/144493
Robust and economic solution for FPGA bit file upgrade Jun 22, 2008 Issued
Array ( [id] => 4757144 [patent_doc_number] => 20080309369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-18 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUITS WITH POWER REDUCTION MECHANISM' [patent_app_type] => utility [patent_app_number] => 12/133969 [patent_app_country] => US [patent_app_date] => 2008-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 15753 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0309/20080309369.pdf [firstpage_image] =>[orig_patent_app_number] => 12133969 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/133969
Semiconductor integrated circuits with power reduction mechanism Jun 4, 2008 Issued
Array ( [id] => 4680284 [patent_doc_number] => 20080246510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-09 [patent_title] => 'REPEATABLE BLOCK PRODUCING A NON-UNIFORM ROUTING ARCHITECTURE IN A FIELD PROGRAMMABLE GATE ARRAY HAVING SEGMENTED TRACKS' [patent_app_type] => utility [patent_app_number] => 12/131258 [patent_app_country] => US [patent_app_date] => 2008-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5709 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20080246510.pdf [firstpage_image] =>[orig_patent_app_number] => 12131258 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/131258
Repeatable block producing a non-uniform routing architecture in a field programmable gate array having segmented tracks Jun 1, 2008 Issued
Array ( [id] => 8029667 [patent_doc_number] => 08143918 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-27 [patent_title] => 'Apparatus for driving a display device, display device including the same, and method thereof' [patent_app_type] => utility [patent_app_number] => 12/131464 [patent_app_country] => US [patent_app_date] => 2008-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8261 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/143/08143918.pdf [firstpage_image] =>[orig_patent_app_number] => 12131464 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/131464
Apparatus for driving a display device, display device including the same, and method thereof Jun 1, 2008 Issued
Array ( [id] => 4737667 [patent_doc_number] => 20080231319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-25 [patent_title] => 'DEDICATED INPUT/OUTPUT FIRST IN/FIRST OUT MODULE FOR A FIELD PROGRAMMABLE GATE ARRAY' [patent_app_type] => utility [patent_app_number] => 12/131722 [patent_app_country] => US [patent_app_date] => 2008-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4453 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20080231319.pdf [firstpage_image] =>[orig_patent_app_number] => 12131722 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/131722
DEDICATED INPUT/OUTPUT FIRST IN/FIRST OUT MODULE FOR A FIELD PROGRAMMABLE GATE ARRAY Jun 1, 2008 Abandoned
Array ( [id] => 178481 [patent_doc_number] => 07656191 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-02 [patent_title] => 'Distributed memory in field-programmable gate array integrated circuit devices' [patent_app_type] => utility [patent_app_number] => 12/156403 [patent_app_country] => US [patent_app_date] => 2008-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6518 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/656/07656191.pdf [firstpage_image] =>[orig_patent_app_number] => 12156403 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/156403
Distributed memory in field-programmable gate array integrated circuit devices May 29, 2008 Issued
Array ( [id] => 4696031 [patent_doc_number] => 20080218215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-11 [patent_title] => 'Advanced Repeater Utilizing Signal Distribution Delay' [patent_app_type] => utility [patent_app_number] => 12/124136 [patent_app_country] => US [patent_app_date] => 2008-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2316 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20080218215.pdf [firstpage_image] =>[orig_patent_app_number] => 12124136 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/124136
Advanced repeater utilizing signal distribution delay May 19, 2008 Issued
Array ( [id] => 123136 [patent_doc_number] => 07710147 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-05-04 [patent_title] => 'Techniques for configuring programmable logic using on-chip nonvolatile memory' [patent_app_type] => utility [patent_app_number] => 12/122723 [patent_app_country] => US [patent_app_date] => 2008-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 7517 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/710/07710147.pdf [firstpage_image] =>[orig_patent_app_number] => 12122723 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/122723
Techniques for configuring programmable logic using on-chip nonvolatile memory May 18, 2008 Issued
Array ( [id] => 143084 [patent_doc_number] => 07688116 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-03-30 [patent_title] => 'Read data path' [patent_app_type] => utility [patent_app_number] => 12/151868 [patent_app_country] => US [patent_app_date] => 2008-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6024 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/688/07688116.pdf [firstpage_image] =>[orig_patent_app_number] => 12151868 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/151868
Read data path May 8, 2008 Issued
Array ( [id] => 8458820 [patent_doc_number] => 08294492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-23 [patent_title] => 'Ultra-low-power circuit' [patent_app_type] => utility [patent_app_number] => 12/598365 [patent_app_country] => US [patent_app_date] => 2008-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 9790 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12598365 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/598365
Ultra-low-power circuit Apr 28, 2008 Issued
Array ( [id] => 6286995 [patent_doc_number] => 20100237792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'DISCHARGE TUBE POWER SUPPLY APPARATUS AND SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/294548 [patent_app_country] => US [patent_app_date] => 2008-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8171 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20100237792.pdf [firstpage_image] =>[orig_patent_app_number] => 12294548 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/294548
Discharge tube power supply apparatus and semiconductor integrated circuit Apr 22, 2008 Issued
Array ( [id] => 4674754 [patent_doc_number] => 20080212382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-04 [patent_title] => 'Crossbar waveform driver circuit' [patent_app_type] => utility [patent_app_number] => 12/081793 [patent_app_country] => US [patent_app_date] => 2008-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4323 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20080212382.pdf [firstpage_image] =>[orig_patent_app_number] => 12081793 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/081793
Crossbar waveform driver circuit Apr 21, 2008 Issued
Array ( [id] => 4884437 [patent_doc_number] => 20080258769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'Tri-State Circuit Element Plus Tri-State-Multiplexer Circuitry' [patent_app_type] => utility [patent_app_number] => 12/060537 [patent_app_country] => US [patent_app_date] => 2008-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2252 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20080258769.pdf [firstpage_image] =>[orig_patent_app_number] => 12060537 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/060537
Tri-State Circuit Element Plus Tri-State-Multiplexer Circuitry Mar 31, 2008 Abandoned
Array ( [id] => 152830 [patent_doc_number] => 07683659 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-03-23 [patent_title] => 'Integrated circuits with jitter-reducing balancing logic' [patent_app_type] => utility [patent_app_number] => 12/060791 [patent_app_country] => US [patent_app_date] => 2008-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8926 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/683/07683659.pdf [firstpage_image] =>[orig_patent_app_number] => 12060791 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/060791
Integrated circuits with jitter-reducing balancing logic Mar 31, 2008 Issued
Array ( [id] => 143081 [patent_doc_number] => 07688113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-30 [patent_title] => 'Current driver suitable for use in a shared bus environment' [patent_app_type] => utility [patent_app_number] => 12/059906 [patent_app_country] => US [patent_app_date] => 2008-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 6409 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/688/07688113.pdf [firstpage_image] =>[orig_patent_app_number] => 12059906 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/059906
Current driver suitable for use in a shared bus environment Mar 30, 2008 Issued
Menu