Daniel D. Chang

Array ( [id] => 5170230 [patent_doc_number] => 20070070661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'LOGIC CIRCUITRY POWERED BY PARTIALLY RECTIFIED AC WAVEFORM' [patent_app_type] => utility [patent_app_number] => 11/424450 [patent_app_country] => US [patent_app_date] => 2006-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7165 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20070070661.pdf [firstpage_image] =>[orig_patent_app_number] => 11424450 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 865854 [patent_doc_number] => 07368938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-06 [patent_title] => 'Input termination circuitry with high impedance at power off' [patent_app_type] => utility [patent_app_number] => 11/455074 [patent_app_country] => US [patent_app_date] => 2006-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3629 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/368/07368938.pdf [firstpage_image] =>[orig_patent_app_number] => 11455074 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5686387 [patent_doc_number] => 20060284702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-21 [patent_title] => 'Coupled FBAR filter' [patent_app_type] => utility [patent_app_number] => 11/453064 [patent_app_country] => US [patent_app_date] => 2006-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9347 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20060284702.pdf [firstpage_image] =>[orig_patent_app_number] => 11453064 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5686388 [patent_doc_number] => 20060284703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-21 [patent_title] => 'Coupled FBAR filter' [patent_app_type] => utility [patent_app_number] => 11/453070 [patent_app_country] => US [patent_app_date] => 2006-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 6984 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20060284703.pdf [firstpage_image] =>[orig_patent_app_number] => 11453070 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 594210 [patent_doc_number] => 07436216 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-10-14 [patent_title] => 'Method and apparatus for a direct current (DC) coupled input buffer' [patent_app_type] => utility [patent_app_number] => 11/452858 [patent_app_country] => US [patent_app_date] => 2006-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4243 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/436/07436216.pdf [firstpage_image] =>[orig_patent_app_number] => 11452858 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5241002 [patent_doc_number] => 20070019493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/452238 [patent_app_country] => US [patent_app_date] => 2006-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5627 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20070019493.pdf [firstpage_image] =>[orig_patent_app_number] => 11452238 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 575980 [patent_doc_number] => 07463060 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-12-09 [patent_title] => 'Programmable logic device and method of testing' [patent_app_type] => utility [patent_app_number] => 11/452714 [patent_app_country] => US [patent_app_date] => 2006-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6983 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/463/07463060.pdf [firstpage_image] =>[orig_patent_app_number] => 11452714 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5163607 [patent_doc_number] => 20070285191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'Piezoelectric resonator with an efficient all-dielectric Bragg reflector' [patent_app_type] => utility [patent_app_number] => 11/450088 [patent_app_country] => US [patent_app_date] => 2006-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4092 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20070285191.pdf [firstpage_image] =>[orig_patent_app_number] => 11450088 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 592994 [patent_doc_number] => 07439825 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-21 [patent_title] => 'Integrated filter including FBAR and saw resonator and fabrication method therefor' [patent_app_type] => utility [patent_app_number] => 11/448707 [patent_app_country] => US [patent_app_date] => 2006-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2379 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/439/07439825.pdf [firstpage_image] =>[orig_patent_app_number] => 11448707 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5698013 [patent_doc_number] => 20060214697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'AC POWERED LOGIC CIRCUITRY' [patent_app_type] => utility [patent_app_number] => 11/421075 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5928 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20060214697.pdf [firstpage_image] =>[orig_patent_app_number] => 11421075 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4686083 [patent_doc_number] => 20080030264 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-07 [patent_title] => 'Amplitude Error Compensating Device and Quadrature Skew Error Compensating Device' [patent_app_type] => utility [patent_app_number] => 11/660968 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11014 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20080030264.pdf [firstpage_image] =>[orig_patent_app_number] => 11660968 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5698010 [patent_doc_number] => 20060214694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'Logic circuit, timing generation circuit, display device, and portable terminal' [patent_app_type] => utility [patent_app_number] => 11/441879 [patent_app_country] => US [patent_app_date] => 2006-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5960 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20060214694.pdf [firstpage_image] =>[orig_patent_app_number] => 11441879 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5202918 [patent_doc_number] => 20070024397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-01 [patent_title] => 'Surface acoustic wave resonator, surface acoustic wave device, and communications equipment' [patent_app_type] => utility [patent_app_number] => 11/442660 [patent_app_country] => US [patent_app_date] => 2006-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8828 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20070024397.pdf [firstpage_image] =>[orig_patent_app_number] => 11442660 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5706681 [patent_doc_number] => 20060195729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'RECONFIGURABLE PROCESSOR MODULE COMPRISING HYBRID STACKED INTEGRATED CIRCUIT DIE ELEMENTS' [patent_app_type] => utility [patent_app_number] => 11/383149 [patent_app_country] => US [patent_app_date] => 2006-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3908 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20060195729.pdf [firstpage_image] =>[orig_patent_app_number] => 11383149 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5146272 [patent_doc_number] => 20070046326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Circuit and circuit connecting method' [patent_app_type] => utility [patent_app_number] => 11/395125 [patent_app_country] => US [patent_app_date] => 2006-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7248 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20070046326.pdf [firstpage_image] =>[orig_patent_app_number] => 11395125 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 392775 [patent_doc_number] => 07302513 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-27 [patent_title] => 'Programmable crossbar signal processor' [patent_app_type] => utility [patent_app_number] => 11/395237 [patent_app_country] => US [patent_app_date] => 2006-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 50 [patent_no_of_words] => 13844 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/302/07302513.pdf [firstpage_image] =>[orig_patent_app_number] => 11395237 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5854942 [patent_doc_number] => 20060226875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-12 [patent_title] => 'Level shifter circuit' [patent_app_type] => utility [patent_app_number] => 11/395374 [patent_app_country] => US [patent_app_date] => 2006-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 7600 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20060226875.pdf [firstpage_image] =>[orig_patent_app_number] => 11395374 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 830612 [patent_doc_number] => 07400168 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-15 [patent_title] => 'Semiconductor device with level conversion circuit' [patent_app_type] => utility [patent_app_number] => 11/395285 [patent_app_country] => US [patent_app_date] => 2006-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 8669 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/400/07400168.pdf [firstpage_image] =>[orig_patent_app_number] => 11395285 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 881656 [patent_doc_number] => 07355455 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-08 [patent_title] => 'Low power consumption MIS semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/369852 [patent_app_country] => US [patent_app_date] => 2006-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 33 [patent_no_of_words] => 21008 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/355/07355455.pdf [firstpage_image] =>[orig_patent_app_number] => 11369852 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 360232 [patent_doc_number] => 07486111 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-03 [patent_title] => 'Programmable logic devices comprising time multiplexed programmable interconnect' [patent_app_type] => utility [patent_app_number] => 11/369541 [patent_app_country] => US [patent_app_date] => 2006-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 37 [patent_no_of_words] => 16263 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/486/07486111.pdf [firstpage_image] =>[orig_patent_app_number] => 11369541 [rel_patent_id] =>[rel_patent_doc_number] =>)