Daniel D. Tsui

Array ( [id] => 13665167 [patent_doc_number] => 10162746 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-25 [patent_title] => Allocating additional requested storage space for a data set in a first managed space in a second managed space [patent_app_type] => utility [patent_app_number] => 15/422390 [patent_app_country] => US [patent_app_date] => 2017-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6277 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15422390 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15789725 [patent_doc_number] => 10628589 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-21 [patent_title] => Methods, systems, and computer readable media for preventing code reuse attacks [patent_app_type] => utility [patent_app_number] => 15/412672 [patent_app_country] => US [patent_app_date] => 2017-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10930 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15412672 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13318277 [patent_doc_number] => 20180210676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-26 [patent_title] => LAZY MECHANISM FOR PREVENTING UNNEEDED DATA REPLICATION IN A MULTI-TIER STORAGE ENVIRONMENT [patent_app_type] => utility [patent_app_number] => 15/412434 [patent_app_country] => US [patent_app_date] => 2017-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7792 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15412434 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14203035 [patent_doc_number] => 10268634 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-04-23 [patent_title] => Proxy hash table [patent_app_type] => utility [patent_app_number] => 15/365887 [patent_app_country] => US [patent_app_date] => 2016-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9233 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15365887 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12453888 [patent_doc_number] => 09983827 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-05-29 [patent_title] => Key-based memory deduplication protection [patent_app_type] => utility [patent_app_number] => 15/363817 [patent_app_country] => US [patent_app_date] => 2016-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6937 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15363817 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12173691 [patent_doc_number] => 09891834 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-13 [patent_title] => 'Writing data spanning plurality of tape cartridges' [patent_app_type] => utility [patent_app_number] => 15/353871 [patent_app_country] => US [patent_app_date] => 2016-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 7466 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15353871 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13199563 [patent_doc_number] => 10114700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-30 [patent_title] => Memory device with page emulation mode [patent_app_type] => utility [patent_app_number] => 15/347307 [patent_app_country] => US [patent_app_date] => 2016-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8398 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15347307 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16263343 [patent_doc_number] => 10754777 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-25 [patent_title] => Systems and methods for implementing coherent memory in a multiprocessor system [patent_app_type] => utility [patent_app_number] => 15/773357 [patent_app_country] => US [patent_app_date] => 2016-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 14997 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15773357 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13199311 [patent_doc_number] => 10114574 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-10-30 [patent_title] => Optimizing storage allocation in a storage system [patent_app_type] => utility [patent_app_number] => 15/339524 [patent_app_country] => US [patent_app_date] => 2016-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8748 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15339524 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12108195 [patent_doc_number] => 09864680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-09 [patent_title] => 'Virtual storage address threshold for freemained frames' [patent_app_type] => utility [patent_app_number] => 15/292583 [patent_app_country] => US [patent_app_date] => 2016-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5865 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 555 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15292583 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13665195 [patent_doc_number] => 10162760 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-25 [patent_title] => Hibernation based on page source [patent_app_type] => utility [patent_app_number] => 15/290261 [patent_app_country] => US [patent_app_date] => 2016-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5399 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15290261 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14571071 [patent_doc_number] => 20190213142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-11 [patent_title] => INFORMATION PROCESSING APPARATUS [patent_app_type] => utility [patent_app_number] => 16/321107 [patent_app_country] => US [patent_app_date] => 2016-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16321107 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14704559 [patent_doc_number] => 10380027 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => Disjointed virtual memory scheme with block bypass [patent_app_type] => utility [patent_app_number] => 15/280015 [patent_app_country] => US [patent_app_date] => 2016-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 9164 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15280015 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11365920 [patent_doc_number] => 20170003901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-05 [patent_title] => 'POWER EFFICIENT METHOD AND SYSTEM FOR EXECUTING HOST DATA PROCESSING TASKS DURING DATA RETENTION OPERATIONS IN A STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 15/260188 [patent_app_country] => US [patent_app_date] => 2016-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6408 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15260188 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14202599 [patent_doc_number] => 10268415 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Data storage device including a first storage unit and a second storage unit and data storage control method thereof [patent_app_type] => utility [patent_app_number] => 15/223347 [patent_app_country] => US [patent_app_date] => 2016-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 6535 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15223347 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11488438 [patent_doc_number] => 09594509 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-03-14 [patent_title] => 'Virtual storage address threshold for freemained frames' [patent_app_type] => utility [patent_app_number] => 15/215040 [patent_app_country] => US [patent_app_date] => 2016-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5865 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 521 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15215040 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15638241 [patent_doc_number] => 10592114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Coordinated in-module RAS features for synchronous DDR compatible memory [patent_app_type] => utility [patent_app_number] => 15/213386 [patent_app_country] => US [patent_app_date] => 2016-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 10352 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15213386 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14149191 [patent_doc_number] => 10254975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-09 [patent_title] => Controller, data storage device, and data communication system having variable communication speed [patent_app_type] => utility [patent_app_number] => 15/187642 [patent_app_country] => US [patent_app_date] => 2016-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3657 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15187642 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11731240 [patent_doc_number] => 20170192683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-06 [patent_title] => 'SYSTEM AND METHOD FOR INCREMENTALLY PERFORMING FULL DATA BACKUP' [patent_app_type] => utility [patent_app_number] => 15/183014 [patent_app_country] => US [patent_app_date] => 2016-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6858 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15183014 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11056308 [patent_doc_number] => 20160253270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-01 [patent_title] => 'PROTECTED MEMORY AREA' [patent_app_type] => utility [patent_app_number] => 15/147761 [patent_app_country] => US [patent_app_date] => 2016-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3451 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15147761 [rel_patent_id] =>[rel_patent_doc_number] =>)