Search

Daniel D. Tsui

Examiner (ID: 9882, Phone: (571)270-3253 , Office: P/2132 )

Most Active Art Unit
2132
Art Unit(s)
2132, 2182, 2185
Total Applications
717
Issued Applications
630
Pending Applications
46
Abandoned Applications
62

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19144261 [patent_doc_number] => 20240143173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => COORDINATED IN-MODULE RAS FEATURES FOR SYNCHRONOUS DDR COMPATIBLE MEMORY [patent_app_type] => utility [patent_app_number] => 18/408558 [patent_app_country] => US [patent_app_date] => 2024-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10430 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18408558 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/408558
Coordinated in-module RAS features for synchronous DDR compatible memory Jan 8, 2024 Issued
Array ( [id] => 19963284 [patent_doc_number] => 12332784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Memory controller, storage device including the memory controller, and method of operating the memory controller and the storage device [patent_app_type] => utility [patent_app_number] => 18/404695 [patent_app_country] => US [patent_app_date] => 2024-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 7711 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18404695 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/404695
Memory controller, storage device including the memory controller, and method of operating the memory controller and the storage device Jan 3, 2024 Issued
Array ( [id] => 19084623 [patent_doc_number] => 20240111424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => REDUCING LATENCY IN PSEUDO CHANNEL BASED MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/527713 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20960 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18527713 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/527713
Reducing latency in pseudo channel based memory systems Dec 3, 2023 Issued
Array ( [id] => 18989780 [patent_doc_number] => 20240061749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => CONSOLIDATING SNAPSHOTS USING PARTITIONED PATCH FILES [patent_app_type] => utility [patent_app_number] => 18/501603 [patent_app_country] => US [patent_app_date] => 2023-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8838 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18501603 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/501603
Consolidating snapshots using partitioned patch files Nov 2, 2023 Issued
Array ( [id] => 19220021 [patent_doc_number] => 20240184725 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => Selective Transfer of Data Including a Priority Byte [patent_app_type] => utility [patent_app_number] => 18/497436 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12304 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18497436 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/497436
Selective transfer of data including a priority byte Oct 29, 2023 Issued
Array ( [id] => 19144327 [patent_doc_number] => 20240143239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => TUNING OF READ/WRITE CYCLE TIME DELAY FOR A MEMORY CIRCUIT DEPENDENT ON OPERATIONAL MODE SELECTION [patent_app_type] => utility [patent_app_number] => 18/379373 [patent_app_country] => US [patent_app_date] => 2023-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4356 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18379373 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/379373
Tuning of read/write cycle time delay for a memory circuit dependent on operational mode selection Oct 11, 2023 Issued
Array ( [id] => 20130826 [patent_doc_number] => 12373139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Systems and methods for input/output dispatch [patent_app_type] => utility [patent_app_number] => 18/475481 [patent_app_country] => US [patent_app_date] => 2023-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3305 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18475481 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/475481
Systems and methods for input/output dispatch Sep 26, 2023 Issued
Array ( [id] => 20358872 [patent_doc_number] => 12474867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => Methods, apparatus, and articles of manufacture to interleave data accesses for improved throughput [patent_app_type] => utility [patent_app_number] => 18/371338 [patent_app_country] => US [patent_app_date] => 2023-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 24222 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18371338 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/371338
Methods, apparatus, and articles of manufacture to interleave data accesses for improved throughput Sep 20, 2023 Issued
Array ( [id] => 19971493 [patent_doc_number] => 12340108 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-24 [patent_title] => Metadata access and conversion during storage system controller update [patent_app_type] => utility [patent_app_number] => 18/370014 [patent_app_country] => US [patent_app_date] => 2023-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 3213 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18370014 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/370014
Metadata access and conversion during storage system controller update Sep 18, 2023 Issued
Array ( [id] => 20257728 [patent_doc_number] => 12430078 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-30 [patent_title] => Memory system and memory controller that transmits commands to memory devices and operating method thereof [patent_app_type] => utility [patent_app_number] => 18/466255 [patent_app_country] => US [patent_app_date] => 2023-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 4271 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18466255 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/466255
Memory system and memory controller that transmits commands to memory devices and operating method thereof Sep 12, 2023 Issued
Array ( [id] => 19719260 [patent_doc_number] => 12204799 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Storage system and memory control method [patent_app_type] => utility [patent_app_number] => 18/244058 [patent_app_country] => US [patent_app_date] => 2023-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 38 [patent_no_of_words] => 21860 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18244058 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/244058
Storage system and memory control method Sep 7, 2023 Issued
Array ( [id] => 19022024 [patent_doc_number] => 20240078195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => SYSTEMS, METHODS, AND DEVICES FOR ADVANCED MEMORY TECHNOLOGY [patent_app_type] => utility [patent_app_number] => 18/239531 [patent_app_country] => US [patent_app_date] => 2023-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7843 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18239531 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/239531
Systems, methods, and devices for advanced memory technology Aug 28, 2023 Issued
Array ( [id] => 19905665 [patent_doc_number] => 12282672 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Magnetic disk device [patent_app_type] => utility [patent_app_number] => 18/451404 [patent_app_country] => US [patent_app_date] => 2023-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 2410 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 403 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18451404 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/451404
Magnetic disk device Aug 16, 2023 Issued
Array ( [id] => 19933555 [patent_doc_number] => 12306759 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-20 [patent_title] => Pseudo lock-step execution across CPU cores [patent_app_type] => utility [patent_app_number] => 18/234633 [patent_app_country] => US [patent_app_date] => 2023-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 0 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18234633 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/234633
Pseudo lock-step execution across CPU cores Aug 15, 2023 Issued
Array ( [id] => 19005662 [patent_doc_number] => 20240069733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => MULTIPLE MEMORY BLOCK ERASE OPERATION [patent_app_type] => utility [patent_app_number] => 18/233433 [patent_app_country] => US [patent_app_date] => 2023-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11826 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18233433 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/233433
Multiple memory block erase operation Aug 13, 2023 Issued
Array ( [id] => 19771885 [patent_doc_number] => 20250053311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-13 [patent_title] => WRITE AGGREGATION BASED ON NAND WEAR LEVEL [patent_app_type] => utility [patent_app_number] => 18/447806 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6256 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447806 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447806
Write aggregation based on NAND wear level Aug 9, 2023 Issued
Array ( [id] => 18810613 [patent_doc_number] => 20230384948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => MANANGING ACCESS OF MULTIPLE EXECUTING PROGRAMS TO NON-LOCAL BLOCK DATA STORAGE [patent_app_type] => utility [patent_app_number] => 18/447235 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24229 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447235 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447235
Managing access of multiple executing programs to non-local block data storage Aug 8, 2023 Issued
Array ( [id] => 19653306 [patent_doc_number] => 12175094 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-12-24 [patent_title] => Fast and flexible data capacity upgrade via efficient reconfiguration [patent_app_type] => utility [patent_app_number] => 18/366817 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 4614 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18366817 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/366817
Fast and flexible data capacity upgrade via efficient reconfiguration Aug 7, 2023 Issued
Array ( [id] => 19669671 [patent_doc_number] => 12182420 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Data resychronization methods and systems in continuous data protection [patent_app_type] => utility [patent_app_number] => 18/357906 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 42 [patent_no_of_words] => 25303 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357906 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/357906
Data resychronization methods and systems in continuous data protection Jul 23, 2023 Issued
Array ( [id] => 19052966 [patent_doc_number] => 20240094935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING PROGRAM [patent_app_type] => utility [patent_app_number] => 18/356170 [patent_app_country] => US [patent_app_date] => 2023-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6018 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18356170 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/356170
INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING PROGRAM Jul 19, 2023 Abandoned
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