Search

Daniel Elliot Namay

Examiner (ID: 8225, Phone: (571)270-5725 , Office: P/3749 )

Most Active Art Unit
3749
Art Unit(s)
3743, 3749, 3762, 4159
Total Applications
893
Issued Applications
621
Pending Applications
8
Abandoned Applications
265

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19283678 [patent_doc_number] => 20240220154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => ARRAY OF NON-VOLATILE MEMORY CELLS TO STORE DATA IN ANALOG FORM AND DIGITAL FORM [patent_app_type] => utility [patent_app_number] => 18/604884 [patent_app_country] => US [patent_app_date] => 2024-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12445 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18604884 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/604884
Array of non-volatile memory cells to store data in analog form and digital form Mar 13, 2024 Issued
Array ( [id] => 19952780 [patent_doc_number] => 12324165 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => Methods of writing and forming memory device [patent_app_type] => utility [patent_app_number] => 18/601994 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 5790 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18601994 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/601994
Methods of writing and forming memory device Mar 10, 2024 Issued
Array ( [id] => 19455013 [patent_doc_number] => 20240315143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => MAGNETIC MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/599458 [patent_app_country] => US [patent_app_date] => 2024-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7439 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18599458 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/599458
Magnetic memory device Mar 7, 2024 Issued
Array ( [id] => 19992495 [patent_doc_number] => 20250130717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => STORAGE DEVICE AND MEMORY CONTROL DEVICE [patent_app_type] => utility [patent_app_number] => 18/597949 [patent_app_country] => US [patent_app_date] => 2024-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6322 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18597949 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/597949
STORAGE DEVICE AND MEMORY CONTROL DEVICE Mar 6, 2024 Issued
Array ( [id] => 20537347 [patent_doc_number] => 12554423 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Accelerated programming of four gate, split-gate flash memory cells [patent_app_type] => utility [patent_app_number] => 18/594492 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 0 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18594492 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/594492
Accelerated programming of four gate, split-gate flash memory cells Mar 3, 2024 Issued
Array ( [id] => 20209431 [patent_doc_number] => 20250279151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-04 [patent_title] => SELF-LEARNING BUILT-IN SELF-TEST (BIST) FOR LEAK DETECTION IN NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/594800 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14621 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18594800 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/594800
Self-learning built-in self-test (BIST) for leak detection in non-volatile memory Mar 3, 2024 Issued
Array ( [id] => 19842526 [patent_doc_number] => 12254925 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Control method and controller of 3D NAND flash [patent_app_type] => utility [patent_app_number] => 18/590207 [patent_app_country] => US [patent_app_date] => 2024-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3013 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18590207 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/590207
Control method and controller of 3D NAND flash Feb 27, 2024 Issued
Array ( [id] => 19964632 [patent_doc_number] => 12334147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => First fire operation for ovonic threshold switch selector [patent_app_type] => utility [patent_app_number] => 18/581340 [patent_app_country] => US [patent_app_date] => 2024-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5610 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18581340 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/581340
First fire operation for ovonic threshold switch selector Feb 18, 2024 Issued
Array ( [id] => 19926010 [patent_doc_number] => 12300302 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Nonvolatile memory devices [patent_app_type] => utility [patent_app_number] => 18/581018 [patent_app_country] => US [patent_app_date] => 2024-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 30 [patent_no_of_words] => 15970 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18581018 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/581018
Nonvolatile memory devices Feb 18, 2024 Issued
Array ( [id] => 19850396 [patent_doc_number] => 20250095747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => MEMORY DEVICE AND OPERATING METHOD OF THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/428275 [patent_app_country] => US [patent_app_date] => 2024-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9765 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18428275 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/428275
Memory device and operating method of the memory device Jan 30, 2024 Issued
Array ( [id] => 20044589 [patent_doc_number] => 20250182811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => OFFSET CALIBRATION METHOD AND APPARATUS FOR HIGH BANDWIDTH MEMORY 3 (HBM3) [patent_app_type] => utility [patent_app_number] => 18/423817 [patent_app_country] => US [patent_app_date] => 2024-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18423817 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/423817
Offset calibration method and apparatus for high bandwidth memory 3 (HBM3) Jan 25, 2024 Issued
Array ( [id] => 19796029 [patent_doc_number] => 12236994 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Semiconductor memory device and memory system having the same [patent_app_type] => utility [patent_app_number] => 18/413924 [patent_app_country] => US [patent_app_date] => 2024-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 7888 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18413924 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/413924
Semiconductor memory device and memory system having the same Jan 15, 2024 Issued
Array ( [id] => 20469231 [patent_doc_number] => 12525273 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-13 [patent_title] => Memory devices including mechanism of protecting a vulnerable word line based on the previous refreshed word lines and relevant methods [patent_app_type] => utility [patent_app_number] => 18/413454 [patent_app_country] => US [patent_app_date] => 2024-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11325 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18413454 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/413454
Memory devices including mechanism of protecting a vulnerable word line based on the previous refreshed word lines and relevant methods Jan 15, 2024 Issued
Array ( [id] => 20146592 [patent_doc_number] => 12380938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Memory device, semiconductor device, and electronic device [patent_app_type] => utility [patent_app_number] => 18/409150 [patent_app_country] => US [patent_app_date] => 2024-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 64 [patent_no_of_words] => 38561 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18409150 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/409150
Memory device, semiconductor device, and electronic device Jan 9, 2024 Issued
Array ( [id] => 19347193 [patent_doc_number] => 20240256156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => SENSE AMPLIFIERS AS STATIC RANDOM ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 18/402990 [patent_app_country] => US [patent_app_date] => 2024-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6491 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18402990 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/402990
Sense amplifiers as static random access memory Jan 2, 2024 Issued
Array ( [id] => 20088553 [patent_doc_number] => 20250218489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => MEMORY DEVICES INCLUDING MECHANISM OF PROTECTING A VULNERABLE WORD LINE BASED ON THE PREVIOUS REFRESHED WORD LINES AND RELEVANT METHODS [patent_app_type] => utility [patent_app_number] => 18/401758 [patent_app_country] => US [patent_app_date] => 2024-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12293 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18401758 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/401758
Memory devices including mechanism of protecting a vulnerable word line based on the previous refreshed word lines and relevant methods Jan 1, 2024 Issued
Array ( [id] => 19118497 [patent_doc_number] => 20240130247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => MAGNETIZATION ROTATIONAL ELEMENT AND MAGNETORESISTIVE EFFECT ELEMENT [patent_app_type] => utility [patent_app_number] => 18/397344 [patent_app_country] => US [patent_app_date] => 2023-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12595 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18397344 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/397344
MAGNETIZATION ROTATIONAL ELEMENT AND MAGNETORESISTIVE EFFECT ELEMENT Dec 26, 2023 Pending
Array ( [id] => 20389123 [patent_doc_number] => 12488856 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-02 [patent_title] => Memory device, operation method of memory device, and operation method of test device configured to test memory device [patent_app_type] => utility [patent_app_number] => 18/395010 [patent_app_country] => US [patent_app_date] => 2023-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 10606 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18395010 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/395010
Memory device, operation method of memory device, and operation method of test device configured to test memory device Dec 21, 2023 Issued
Array ( [id] => 20611010 [patent_doc_number] => 12586614 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Data transmission/receiving circuit, data training circuit and semiconductor apparatus including the same [patent_app_type] => utility [patent_app_number] => 18/545860 [patent_app_country] => US [patent_app_date] => 2023-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18545860 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/545860
Data transmission/receiving circuit, data training circuit and semiconductor apparatus including the same Dec 18, 2023 Issued
Array ( [id] => 19085938 [patent_doc_number] => 20240112739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => PROGRAMMING FOR THREE-DIMENSIONAL NAND MEMORY [patent_app_type] => utility [patent_app_number] => 18/537263 [patent_app_country] => US [patent_app_date] => 2023-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9171 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18537263 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/537263
Programming for three-dimensional NAND memory Dec 11, 2023 Issued
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