Daniel F. Mcmahon

Array ( [id] => 18727953 [patent_doc_number] => 20230342246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => SEMICONDUCTOR CHIP FOR CORRECTING ALIGNED ERROR, SEMICONDUCTOR SYSTEM FOR CORRECTING ALIGNED ERROR, AND METHOD FOR CORRECTING ALIGNED ERROR [patent_app_type] => utility [patent_app_number] => 18/139440 [patent_app_country] => US [patent_app_date] => 2023-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6686 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18139440 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19312996 [patent_doc_number] => 12038808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Memory integrity check [patent_app_type] => utility [patent_app_number] => 18/305497 [patent_app_country] => US [patent_app_date] => 2023-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4795 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18305497 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19924567 [patent_doc_number] => 12298847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Tracking host-provided metadata in a memory sub-system [patent_app_type] => utility [patent_app_number] => 18/299532 [patent_app_country] => US [patent_app_date] => 2023-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5499 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18299532 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18555048 [patent_doc_number] => 20230253064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => IMPRINT MANAGEMENT FOR MEMORY [patent_app_type] => utility [patent_app_number] => 18/129585 [patent_app_country] => US [patent_app_date] => 2023-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 66779 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18129585 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18513103 [patent_doc_number] => 20230229328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => Systems, Methods, and Computer Readable Media Providing Arbitrary Sizing of Data Extents [patent_app_type] => utility [patent_app_number] => 18/191985 [patent_app_country] => US [patent_app_date] => 2023-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8314 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18191985 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19391294 [patent_doc_number] => 20240281164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => METHOD FOR SIGNALING MEMORY REQUIREMENTS IN ATSC3.0 WHEN OUT-OF-ORDER DATA IS BEING UTILIZED [patent_app_type] => utility [patent_app_number] => 18/186808 [patent_app_country] => US [patent_app_date] => 2023-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5745 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18186808 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19340326 [patent_doc_number] => 12050514 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-07-30 [patent_title] => Deep neural network implementation for soft decoding of BCH code [patent_app_type] => utility [patent_app_number] => 18/184872 [patent_app_country] => US [patent_app_date] => 2023-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 24738 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18184872 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18486238 [patent_doc_number] => 20230213581 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => Techniques For Capturing Signals From Logic Circuits At A Logic Analyzer [patent_app_type] => utility [patent_app_number] => 18/122238 [patent_app_country] => US [patent_app_date] => 2023-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8961 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18122238 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18486952 [patent_doc_number] => 20230214298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => DATA RECOVERY BASED ON PARITY DATA IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 18/184395 [patent_app_country] => US [patent_app_date] => 2023-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7732 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18184395 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18486949 [patent_doc_number] => 20230214295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => ERROR RATES FOR MEMORY WITH BUILT IN ERROR CORRECTION AND DETECTION [patent_app_type] => utility [patent_app_number] => 18/121062 [patent_app_country] => US [patent_app_date] => 2023-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10994 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18121062 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19856949 [patent_doc_number] => 12259783 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-25 [patent_title] => Semiconductor device and operation method thereof [patent_app_type] => utility [patent_app_number] => 18/183679 [patent_app_country] => US [patent_app_date] => 2023-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6434 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18183679 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19259457 [patent_doc_number] => 12019511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-25 [patent_title] => Information processing apparatus, method, and storage medium [patent_app_type] => utility [patent_app_number] => 18/181212 [patent_app_country] => US [patent_app_date] => 2023-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 9200 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18181212 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18471343 [patent_doc_number] => 20230205629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => MEMORY SUB-SYSTEM USING PARTIAL SUPERBLOCKS [patent_app_type] => utility [patent_app_number] => 18/117555 [patent_app_country] => US [patent_app_date] => 2023-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7556 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18117555 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19312997 [patent_doc_number] => 12038809 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-07-16 [patent_title] => Failure analysis for uncorrectable error events [patent_app_type] => utility [patent_app_number] => 18/179235 [patent_app_country] => US [patent_app_date] => 2023-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 9193 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18179235 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18940971 [patent_doc_number] => 20240036110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/174230 [patent_app_country] => US [patent_app_date] => 2023-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5924 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18174230 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19426197 [patent_doc_number] => 12085605 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-09-10 [patent_title] => Systems and methods for adjusting input-output impedance for I/O interfaces [patent_app_type] => utility [patent_app_number] => 18/173510 [patent_app_country] => US [patent_app_date] => 2023-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7193 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18173510 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19568430 [patent_doc_number] => 12143213 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Transmission device, transmission method, reception device, reception method, integrated circuit, and program [patent_app_type] => utility [patent_app_number] => 18/112654 [patent_app_country] => US [patent_app_date] => 2023-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 78 [patent_figures_cnt] => 78 [patent_no_of_words] => 39552 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18112654 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18883760 [patent_doc_number] => 20240007129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => CONSTRUCTING METHOD, PROCESSING DEVICE, STORAGE MEDIUM AND CODING METHOD [patent_app_type] => utility [patent_app_number] => 18/168888 [patent_app_country] => US [patent_app_date] => 2023-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18168888 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18438370 [patent_doc_number] => 20230185665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => APPARATUSES, SYSTEMS, AND METHODS FOR FORCED ERROR CHECK AND SCRUB READOUTS [patent_app_type] => utility [patent_app_number] => 18/167768 [patent_app_country] => US [patent_app_date] => 2023-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8899 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18167768 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19152205 [patent_doc_number] => 11977113 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-05-07 [patent_title] => Quantum error-correction in microwave integrated quantum circuits [patent_app_type] => utility [patent_app_number] => 18/165272 [patent_app_country] => US [patent_app_date] => 2023-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 13749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18165272 [rel_patent_id] =>[rel_patent_doc_number] =>)