Search

Daniel F. Mcmahon

Examiner (ID: 9084, Phone: (571)270-3232 , Office: P/2117 )

Most Active Art Unit
2111
Art Unit(s)
2111, 2117
Total Applications
1218
Issued Applications
1075
Pending Applications
59
Abandoned Applications
109

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17744388 [patent_doc_number] => 11392456 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-07-19 [patent_title] => Calculating parity as a data stripe is modified [patent_app_type] => utility [patent_app_number] => 17/112481 [patent_app_country] => US [patent_app_date] => 2020-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 26 [patent_no_of_words] => 27769 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17112481 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/112481
Calculating parity as a data stripe is modified Dec 3, 2020 Issued
Array ( [id] => 17977404 [patent_doc_number] => 11494264 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-08 [patent_title] => Generating a protected and balanced codeword [patent_app_type] => utility [patent_app_number] => 17/111235 [patent_app_country] => US [patent_app_date] => 2020-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 30926 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17111235 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/111235
Generating a protected and balanced codeword Dec 2, 2020 Issued
Array ( [id] => 16859169 [patent_doc_number] => 20210159914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => Method for Efficient Erasure Coded Group Management in shared Nothing Storage Clusters [patent_app_type] => utility [patent_app_number] => 17/105286 [patent_app_country] => US [patent_app_date] => 2020-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7044 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17105286 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/105286
Method for efficient erasure coded group management in shared nothing storage clusters Nov 24, 2020 Issued
Array ( [id] => 18199452 [patent_doc_number] => 20230052971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => SPECTRAL LEAKAGE-BASED LOOPBACK METHOD FOR PREDICTING PERFORMANCE OF MIXED-SIGNAL CIRCUIT, AND SYSTEM THEREFOR [patent_app_type] => utility [patent_app_number] => 17/788511 [patent_app_country] => US [patent_app_date] => 2020-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4396 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17788511 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/788511
Spectral leakage-based loopback method for predicting performance of mixed-signal circuit, and system therefor Nov 19, 2020 Issued
Array ( [id] => 17729562 [patent_doc_number] => 11385949 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-12 [patent_title] => Apparatus having a multiplexer for passive input/output expansion [patent_app_type] => utility [patent_app_number] => 17/092778 [patent_app_country] => US [patent_app_date] => 2020-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7939 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17092778 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/092778
Apparatus having a multiplexer for passive input/output expansion Nov 8, 2020 Issued
Array ( [id] => 16729802 [patent_doc_number] => 20210096949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/092054 [patent_app_country] => US [patent_app_date] => 2020-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13394 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17092054 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/092054
Memory system Nov 5, 2020 Issued
Array ( [id] => 17729575 [patent_doc_number] => 11385962 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-12 [patent_title] => Method and apparatus for error correction encoding compressed data [patent_app_type] => utility [patent_app_number] => 17/089729 [patent_app_country] => US [patent_app_date] => 2020-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5567 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17089729 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/089729
Method and apparatus for error correction encoding compressed data Nov 4, 2020 Issued
Array ( [id] => 18015156 [patent_doc_number] => 11507453 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Low-latency register error correction [patent_app_type] => utility [patent_app_number] => 17/074958 [patent_app_country] => US [patent_app_date] => 2020-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 10340 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17074958 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/074958
Low-latency register error correction Oct 19, 2020 Issued
Array ( [id] => 17010684 [patent_doc_number] => 20210241845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => DETERMINING READ VOLTAGES FOR MEMORY SYSTEMS WITH MACHINE LEARNING [patent_app_type] => utility [patent_app_number] => 17/073800 [patent_app_country] => US [patent_app_date] => 2020-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11685 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17073800 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/073800
Determining read voltages for memory systems with machine learning Oct 18, 2020 Issued
Array ( [id] => 16618062 [patent_doc_number] => 20210036715 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => TRANSMITTING APPARATUS AND SIGNAL PROCESSING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/071607 [patent_app_country] => US [patent_app_date] => 2020-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 39808 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17071607 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/071607
Transmitting apparatus and signal processing method thereof Oct 14, 2020 Issued
Array ( [id] => 17542125 [patent_doc_number] => 11307242 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-04-19 [patent_title] => Quantum error-correction in microwave integrated quantum circuits [patent_app_type] => utility [patent_app_number] => 17/066187 [patent_app_country] => US [patent_app_date] => 2020-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 13782 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17066187 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/066187
Quantum error-correction in microwave integrated quantum circuits Oct 7, 2020 Issued
Array ( [id] => 17589563 [patent_doc_number] => 11327836 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-05-10 [patent_title] => Protection of data on a data path in a memory system [patent_app_type] => utility [patent_app_number] => 17/037382 [patent_app_country] => US [patent_app_date] => 2020-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10155 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17037382 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/037382
Protection of data on a data path in a memory system Sep 28, 2020 Issued
Array ( [id] => 17484432 [patent_doc_number] => 20220091936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => SYSTEMS AND METHODS FOR ENCODING METADATA [patent_app_type] => utility [patent_app_number] => 17/030746 [patent_app_country] => US [patent_app_date] => 2020-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13805 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17030746 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/030746
Systems and methods for encoding metadata Sep 23, 2020 Issued
Array ( [id] => 16584823 [patent_doc_number] => 20210019225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => TECHNIQUES TO IMPLEMENT A HYBRID ERROR CORRECTION CODE SCHEME [patent_app_type] => utility [patent_app_number] => 17/031772 [patent_app_country] => US [patent_app_date] => 2020-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12625 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17031772 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/031772
Techniques to implement a hybrid error correction code scheme Sep 23, 2020 Issued
Array ( [id] => 17605942 [patent_doc_number] => 11334431 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => System and method for data protection in solid-state drives [patent_app_type] => utility [patent_app_number] => 17/026761 [patent_app_country] => US [patent_app_date] => 2020-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11637 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17026761 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/026761
System and method for data protection in solid-state drives Sep 20, 2020 Issued
Array ( [id] => 16886809 [patent_doc_number] => 20210173005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => TEST DEVICE AND METHOD WITH BUILT-IN SELF-TEST LOGIC [patent_app_type] => utility [patent_app_number] => 17/021638 [patent_app_country] => US [patent_app_date] => 2020-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3727 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17021638 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/021638
Test device and method with built-in self-test logic Sep 14, 2020 Issued
Array ( [id] => 17138259 [patent_doc_number] => 11139832 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-10-05 [patent_title] => LDPC decoder and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/020257 [patent_app_country] => US [patent_app_date] => 2020-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 10518 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17020257 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/020257
LDPC decoder and operating method thereof Sep 13, 2020 Issued
Array ( [id] => 17622939 [patent_doc_number] => 11341998 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-05-24 [patent_title] => Hardware-based read sample averaging [patent_app_type] => utility [patent_app_number] => 17/016484 [patent_app_country] => US [patent_app_date] => 2020-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9912 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17016484 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/016484
Hardware-based read sample averaging Sep 9, 2020 Issued
Array ( [id] => 18899343 [patent_doc_number] => 20240014828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => METHOD AND APPARATUS FOR IMPROVED BELIEF PROPAGATION BASED DECODING [patent_app_type] => utility [patent_app_number] => 18/022215 [patent_app_country] => US [patent_app_date] => 2020-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13810 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18022215 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/022215
Method and apparatus for improved belief propagation based decoding Sep 2, 2020 Issued
Array ( [id] => 17469175 [patent_doc_number] => 11275652 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-03-15 [patent_title] => Storing erasure coded data based on reliability of storage devices [patent_app_type] => utility [patent_app_number] => 17/008709 [patent_app_country] => US [patent_app_date] => 2020-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7920 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17008709 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/008709
Storing erasure coded data based on reliability of storage devices Aug 31, 2020 Issued
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