Search

Daniel F. Mcmahon

Examiner (ID: 12089, Phone: (571)270-3232 , Office: P/2117 )

Most Active Art Unit
2111
Art Unit(s)
2111, 2117
Total Applications
1253
Issued Applications
1093
Pending Applications
74
Abandoned Applications
110

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19405708 [patent_doc_number] => 20240289219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => METHODS FOR ERROR COUNT REPORTING WITH SCALED ERROR COUNT INFORMATION, AND MEMORY DEVICES EMPLOYING THE SAME [patent_app_type] => utility [patent_app_number] => 18/652714 [patent_app_country] => US [patent_app_date] => 2024-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4074 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18652714 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/652714
Methods for error count reporting with scaled error count information, and memory devices employing the same Apr 30, 2024 Issued
Array ( [id] => 19393696 [patent_doc_number] => 20240283566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => Data Processing Method and Device [patent_app_type] => utility [patent_app_number] => 18/651185 [patent_app_country] => US [patent_app_date] => 2024-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12503 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18651185 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/651185
Data processing method and device Apr 29, 2024 Issued
Array ( [id] => 19393595 [patent_doc_number] => 20240283465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => CODING METHOD, DECODING METHOD, AND COMMUNICATIONS APPARATUS [patent_app_type] => utility [patent_app_number] => 18/649379 [patent_app_country] => US [patent_app_date] => 2024-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22592 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18649379 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/649379
Coding method, decoding method, and communications apparatus Apr 28, 2024 Issued
Array ( [id] => 19758742 [patent_doc_number] => 20250047307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => SYSTEM AND METHOD FOR LOW DENSITY PARITY CHECK (LDPC) CODE WITH 2/3 CODE RATE [patent_app_type] => utility [patent_app_number] => 18/647759 [patent_app_country] => US [patent_app_date] => 2024-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14979 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18647759 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/647759
SYSTEM AND METHOD FOR LOW DENSITY PARITY CHECK (LDPC) CODE WITH 2/3 CODE RATE Apr 25, 2024 Pending
Array ( [id] => 19362831 [patent_doc_number] => 20240264865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => LEVEL TWO FIRST-IN-FIRST-OUT TRANSMISSION [patent_app_type] => utility [patent_app_number] => 18/641544 [patent_app_country] => US [patent_app_date] => 2024-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15555 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18641544 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/641544
LEVEL TWO FIRST-IN-FIRST-OUT TRANSMISSION Apr 21, 2024 Issued
Array ( [id] => 20311176 [patent_doc_number] => 20250328805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-23 [patent_title] => MEASUREMENT-BASED QUBIT BENCHMARKING [patent_app_type] => utility [patent_app_number] => 18/641037 [patent_app_country] => US [patent_app_date] => 2024-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7195 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18641037 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/641037
MEASUREMENT-BASED QUBIT BENCHMARKING Apr 18, 2024 Pending
Array ( [id] => 20389122 [patent_doc_number] => 12488855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-02 [patent_title] => Fail classification device for plurality of memory cells and method thereof [patent_app_type] => utility [patent_app_number] => 18/638563 [patent_app_country] => US [patent_app_date] => 2024-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1173 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18638563 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/638563
Fail classification device for plurality of memory cells and method thereof Apr 16, 2024 Issued
Array ( [id] => 19851455 [patent_doc_number] => 20250096806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => ERROR DETECTORS AND MEMORY DEVICES HAVING ERROR DETECTORS THEREIN, AND METHODS OF PERFORMING ERROR DETECTION [patent_app_type] => utility [patent_app_number] => 18/636706 [patent_app_country] => US [patent_app_date] => 2024-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14095 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18636706 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/636706
Error detectors and memory devices having error detectors therein, and methods of performing error detection Apr 15, 2024 Issued
Array ( [id] => 19350173 [patent_doc_number] => 20240259137 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => INFORMATION INDICATION METHOD, NETWORK DEVICE, TERMINAL, CHIP, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/629241 [patent_app_country] => US [patent_app_date] => 2024-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18530 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629241 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629241
INFORMATION INDICATION METHOD, NETWORK DEVICE, TERMINAL, CHIP, AND STORAGE MEDIUM Apr 7, 2024 Pending
Array ( [id] => 20281831 [patent_doc_number] => 20250307073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => DATA ENCODING METHOD FOR 3D NAND FLASH MEMORY [patent_app_type] => utility [patent_app_number] => 18/624970 [patent_app_country] => US [patent_app_date] => 2024-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9060 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18624970 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/624970
Data encoding method for 3D NAND flash memory Apr 1, 2024 Issued
Array ( [id] => 20228493 [patent_doc_number] => 12417145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Decoding parameter updating method, memory storage device, and memory control circuit unit [patent_app_type] => utility [patent_app_number] => 18/624125 [patent_app_country] => US [patent_app_date] => 2024-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4497 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18624125 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/624125
Decoding parameter updating method, memory storage device, and memory control circuit unit Apr 1, 2024 Issued
Array ( [id] => 20507150 [patent_doc_number] => 12541426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Memory device with error correction code [patent_app_type] => utility [patent_app_number] => 18/623038 [patent_app_country] => US [patent_app_date] => 2024-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18623038 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/623038
Memory device with error correction code Mar 31, 2024 Issued
Array ( [id] => 20130971 [patent_doc_number] => 12373284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Method for accessing flash memory module and associated flash memory controller and electronic device [patent_app_type] => utility [patent_app_number] => 18/621069 [patent_app_country] => US [patent_app_date] => 2024-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18621069 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/621069
Method for accessing flash memory module and associated flash memory controller and electronic device Mar 27, 2024 Issued
Array ( [id] => 19320248 [patent_doc_number] => 20240241792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => ON-SSD ERASURE CODING WITH UNI-DIRECTIONAL COMMANDS [patent_app_type] => utility [patent_app_number] => 18/618965 [patent_app_country] => US [patent_app_date] => 2024-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12815 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18618965 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/618965
ON-SSD erasure coding with uni-directional commands Mar 26, 2024 Issued
Array ( [id] => 20161938 [patent_doc_number] => 12388580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Base station, terminal, and communication method [patent_app_type] => utility [patent_app_number] => 18/617114 [patent_app_country] => US [patent_app_date] => 2024-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 4675 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18617114 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/617114
Base station, terminal, and communication method Mar 25, 2024 Issued
Array ( [id] => 20441340 [patent_doc_number] => 12512180 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Method and system for repairing a dynamic random access memory (dram) of memory device [patent_app_type] => utility [patent_app_number] => 18/614954 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3655 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18614954 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/614954
Method and system for repairing a dynamic random access memory (dram) of memory device Mar 24, 2024 Issued
Array ( [id] => 19482063 [patent_doc_number] => 20240330105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => DYNAMICALLY CONFIGURABLE LOW DENSITY PARITY CHECK CODE [patent_app_type] => utility [patent_app_number] => 18/615592 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615592 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/615592
Dynamically configurable low density parity check code Mar 24, 2024 Issued
Array ( [id] => 20550410 [patent_doc_number] => 12561203 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-24 [patent_title] => Memory system for performing read reclaim [patent_app_type] => utility [patent_app_number] => 18/610279 [patent_app_country] => US [patent_app_date] => 2024-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6864 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18610279 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/610279
Memory system for performing read reclaim Mar 19, 2024 Issued
Array ( [id] => 19434660 [patent_doc_number] => 20240303158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => ERROR CORRECTION MEMORY DEVICE WITH FAST DATA ACCESS [patent_app_type] => utility [patent_app_number] => 18/604227 [patent_app_country] => US [patent_app_date] => 2024-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23409 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18604227 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/604227
Error correction memory device with fast data access Mar 12, 2024 Issued
Array ( [id] => 20623975 [patent_doc_number] => 12591483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-31 [patent_title] => System and method for protecting data [patent_app_type] => utility [patent_app_number] => 18/595177 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18595177 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/595177
System and method for protecting data Mar 3, 2024 Issued
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