Search

Daniel H. Pan

Examiner (ID: 18277)

Most Active Art Unit
2182
Art Unit(s)
2302, 2182, 2183, 2783, 2315, 2899
Total Applications
1471
Issued Applications
1279
Pending Applications
50
Abandoned Applications
145

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15836877 [patent_doc_number] => 20200133721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => SEMICONDUCTOR DEVICE AND SYSTEMS USING THE SAME [patent_app_type] => utility [patent_app_number] => 16/575021 [patent_app_country] => US [patent_app_date] => 2019-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21936 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16575021 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/575021
Semiconductor device and systems using the same Sep 17, 2019 Issued
Array ( [id] => 16833911 [patent_doc_number] => 11010162 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => Electronic apparatus can execute instruction and instruction executing method [patent_app_type] => utility [patent_app_number] => 16/574062 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2415 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16574062 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/574062
Electronic apparatus can execute instruction and instruction executing method Sep 16, 2019 Issued
Array ( [id] => 17180036 [patent_doc_number] => 11157278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-26 [patent_title] => Histogram operation [patent_app_type] => utility [patent_app_number] => 16/570931 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 40 [patent_no_of_words] => 23608 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16570931 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/570931
Histogram operation Sep 12, 2019 Issued
Array ( [id] => 17076665 [patent_doc_number] => 11113063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-07 [patent_title] => Method and apparatus to control the use of hierarchical branch predictors based on the effectiveness of their results [patent_app_type] => utility [patent_app_number] => 16/565476 [patent_app_country] => US [patent_app_date] => 2019-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8069 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16565476 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/565476
Method and apparatus to control the use of hierarchical branch predictors based on the effectiveness of their results Sep 8, 2019 Issued
Array ( [id] => 16910422 [patent_doc_number] => 11042462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-22 [patent_title] => Filtering based on instruction execution characteristics for assessing program performance [patent_app_type] => utility [patent_app_number] => 16/559999 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4726 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16559999 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/559999
Filtering based on instruction execution characteristics for assessing program performance Sep 3, 2019 Issued
Array ( [id] => 15214613 [patent_doc_number] => 20190369993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => DECIMAL LOAD IMMEDIATE INSTRUCTION [patent_app_type] => utility [patent_app_number] => 16/544038 [patent_app_country] => US [patent_app_date] => 2019-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8099 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16544038 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/544038
Decimal load immediate instruction Aug 18, 2019 Issued
Array ( [id] => 16607909 [patent_doc_number] => 10908913 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-02 [patent_title] => Method for a delayed branch implementation by using a front end track table [patent_app_type] => utility [patent_app_number] => 16/537329 [patent_app_country] => US [patent_app_date] => 2019-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4941 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16537329 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/537329
Method for a delayed branch implementation by using a front end track table Aug 8, 2019 Issued
Array ( [id] => 16972292 [patent_doc_number] => 11068264 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-20 [patent_title] => Processors, methods, systems, and instructions to load multiple data elements to destination storage locations other than packed data registers [patent_app_type] => utility [patent_app_number] => 16/537318 [patent_app_country] => US [patent_app_date] => 2019-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 30 [patent_no_of_words] => 28131 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16537318 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/537318
Processors, methods, systems, and instructions to load multiple data elements to destination storage locations other than packed data registers Aug 8, 2019 Issued
Array ( [id] => 17209441 [patent_doc_number] => 11169813 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Policy handling for data pipelines [patent_app_type] => utility [patent_app_number] => 16/525944 [patent_app_country] => US [patent_app_date] => 2019-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12976 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16525944 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/525944
Policy handling for data pipelines Jul 29, 2019 Issued
Array ( [id] => 15042753 [patent_doc_number] => 20190332381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => SYNCHRONIZING A SET OF CODE BRANCHES [patent_app_type] => utility [patent_app_number] => 16/504340 [patent_app_country] => US [patent_app_date] => 2019-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10063 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16504340 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/504340
Synchronizing a set of code branches Jul 7, 2019 Issued
Array ( [id] => 16565862 [patent_doc_number] => 10891231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Streaming engine with flexible streaming engine template supporting differing number of nested loops with corresponding loop counts and loop offsets [patent_app_type] => utility [patent_app_number] => 16/459210 [patent_app_country] => US [patent_app_date] => 2019-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 39 [patent_no_of_words] => 21243 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16459210 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/459210
Streaming engine with flexible streaming engine template supporting differing number of nested loops with corresponding loop counts and loop offsets Jun 30, 2019 Issued
Array ( [id] => 16543336 [patent_doc_number] => 20200409751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => CORE-TO-CORE START "OFFLOAD" INSTRUCTION(S) [patent_app_type] => utility [patent_app_number] => 16/457968 [patent_app_country] => US [patent_app_date] => 2019-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20903 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16457968 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/457968
Core-to-core start "offload" instruction(s) Jun 28, 2019 Issued
Array ( [id] => 16543346 [patent_doc_number] => 20200409761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => ALLOCATING COMPUTING RESOURCES BASED ON PROPERTIES ASSOCIATED WITH LOCATION [patent_app_type] => utility [patent_app_number] => 16/451632 [patent_app_country] => US [patent_app_date] => 2019-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8559 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16451632 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/451632
Allocating computing resources based on properties associated with location Jun 24, 2019 Issued
Array ( [id] => 16758499 [patent_doc_number] => 10977047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Hazard detection of out-of-order execution of load and store instructions in processors without using real addresses [patent_app_type] => utility [patent_app_number] => 16/449714 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 16171 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449714 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/449714
Hazard detection of out-of-order execution of load and store instructions in processors without using real addresses Jun 23, 2019 Issued
Array ( [id] => 14966741 [patent_doc_number] => 20190310849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-10 [patent_title] => EXECUTING LOAD-STORE OPERATIONS WITHOUT ADDRESS TRANSLATION HARDWARE PER LOAD-STORE UNIT PORT [patent_app_type] => utility [patent_app_number] => 16/448383 [patent_app_country] => US [patent_app_date] => 2019-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16857 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16448383 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/448383
Executing load-store operations without address translation hardware per load-store unit port Jun 20, 2019 Issued
Array ( [id] => 16667077 [patent_doc_number] => 10936323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-02 [patent_title] => Optimize control-flow convergence on SIMD engine using divergence depth [patent_app_type] => utility [patent_app_number] => 16/439210 [patent_app_country] => US [patent_app_date] => 2019-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 5852 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 364 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16439210 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/439210
Optimize control-flow convergence on SIMD engine using divergence depth Jun 11, 2019 Issued
Array ( [id] => 15622631 [patent_doc_number] => 20200081720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => PARALLEL DISTRIBUTED PROCESSING CONTROL SYSTEM, PROGRAM, AND PARALLEL DISTRIBUTED PROCESSING CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 16/436948 [patent_app_country] => US [patent_app_date] => 2019-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10509 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16436948 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/436948
Parallel distributed processing control system, program, and parallel distributed processing control method Jun 10, 2019 Issued
Array ( [id] => 15182443 [patent_doc_number] => 20190361813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-28 [patent_title] => STREAMING ENGINE WITH MULTI DIMENSIONAL CIRCULAR ADDRESSING SELECTABLE AT EACH DIMENSION [patent_app_type] => utility [patent_app_number] => 16/437900 [patent_app_country] => US [patent_app_date] => 2019-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21185 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 336 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16437900 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/437900
Streaming engine with multi dimensional circular addressing selectable at each dimension Jun 10, 2019 Issued
Array ( [id] => 17091597 [patent_doc_number] => 11119786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Automated multidimensional elasticity for streaming application runtimes [patent_app_type] => utility [patent_app_number] => 16/426644 [patent_app_country] => US [patent_app_date] => 2019-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12310 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16426644 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/426644
Automated multidimensional elasticity for streaming application runtimes May 29, 2019 Issued
Array ( [id] => 17091597 [patent_doc_number] => 11119786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Automated multidimensional elasticity for streaming application runtimes [patent_app_type] => utility [patent_app_number] => 16/426644 [patent_app_country] => US [patent_app_date] => 2019-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12310 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16426644 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/426644
Automated multidimensional elasticity for streaming application runtimes May 29, 2019 Issued
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