
Daniel H. Pan
Examiner (ID: 721, Phone: (571)272-4172 , Office: P/2182 )
| Most Active Art Unit | 2182 |
| Art Unit(s) | 2182, 2183, 2302, 2783, 2315, 2899 |
| Total Applications | 1471 |
| Issued Applications | 1281 |
| Pending Applications | 50 |
| Abandoned Applications | 145 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6814992
[patent_doc_number] => 20030074542
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-04-17
[patent_title] => 'Multiprocessor system and program optimizing method'
[patent_app_type] => new
[patent_app_number] => 10/230199
[patent_app_country] => US
[patent_app_date] => 2002-08-29
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 6836
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0074/20030074542.pdf
[firstpage_image] =>[orig_patent_app_number] => 10230199
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/230199 | Multiprocessor system and program optimizing method | Aug 28, 2002 | Issued |
Array
(
[id] => 726052
[patent_doc_number] => 07051186
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[patent_kind] => B2
[patent_issue_date] => 2006-05-23
[patent_title] => 'Selective bypassing of a multi-port register file'
[patent_app_type] => utility
[patent_app_number] => 10/230492
[patent_app_country] => US
[patent_app_date] => 2002-08-29
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[pdf_file] => patents/07/051/07051186.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/230492 | Selective bypassing of a multi-port register file | Aug 28, 2002 | Issued |
Array
(
[id] => 965686
[patent_doc_number] => 06950925
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[patent_kind] => B1
[patent_issue_date] => 2005-09-27
[patent_title] => 'Scheduler for use in a microprocessor that supports data-speculative execution'
[patent_app_type] => utility
[patent_app_number] => 10/229563
[patent_app_country] => US
[patent_app_date] => 2002-08-28
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[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/06/950/06950925.pdf
[firstpage_image] =>[orig_patent_app_number] => 10229563
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/229563 | Scheduler for use in a microprocessor that supports data-speculative execution | Aug 27, 2002 | Issued |
Array
(
[id] => 904902
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[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-03-04
[patent_title] => 'Method and system for fast linked processor in a system on a chip (SoC)'
[patent_app_type] => utility
[patent_app_number] => 10/229543
[patent_app_country] => US
[patent_app_date] => 2002-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 3167
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[firstpage_image] =>[orig_patent_app_number] => 10229543
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/229543 | Method and system for fast linked processor in a system on a chip (SoC) | Aug 26, 2002 | Issued |
Array
(
[id] => 536340
[patent_doc_number] => 07191313
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-03-13
[patent_title] => 'Microprocessor'
[patent_app_type] => utility
[patent_app_number] => 10/227866
[patent_app_country] => US
[patent_app_date] => 2002-08-27
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[patent_drawing_sheets_cnt] => 9
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[pdf_file] => patents/07/191/07191313.pdf
[firstpage_image] =>[orig_patent_app_number] => 10227866
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/227866 | Microprocessor | Aug 26, 2002 | Issued |
Array
(
[id] => 7404865
[patent_doc_number] => 20040039902
[patent_country] => US
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[patent_issue_date] => 2004-02-26
[patent_title] => 'Exception handling for single instructions with multiple data'
[patent_app_type] => new
[patent_app_number] => 10/229317
[patent_app_country] => US
[patent_app_date] => 2002-08-26
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[pdf_file] => publications/A1/0039/20040039902.pdf
[firstpage_image] =>[orig_patent_app_number] => 10229317
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/229317 | Exception handling for single instructions with multiple data | Aug 25, 2002 | Issued |
Array
(
[id] => 839882
[patent_doc_number] => 07395412
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-07-01
[patent_title] => 'Apparatus and method for extending data modes in a microprocessor'
[patent_app_type] => utility
[patent_app_number] => 10/227008
[patent_app_country] => US
[patent_app_date] => 2002-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => patents/07/395/07395412.pdf
[firstpage_image] =>[orig_patent_app_number] => 10227008
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/227008 | Apparatus and method for extending data modes in a microprocessor | Aug 21, 2002 | Issued |
Array
(
[id] => 6741651
[patent_doc_number] => 20030159020
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-08-21
[patent_title] => 'Non-temporal memory reference control mechanism'
[patent_app_type] => new
[patent_app_number] => 10/227583
[patent_app_country] => US
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[pdf_file] => publications/A1/0159/20030159020.pdf
[firstpage_image] =>[orig_patent_app_number] => 10227583
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/227583 | Non-temporal memory reference control mechanism | Aug 21, 2002 | Issued |
Array
(
[id] => 6707735
[patent_doc_number] => 20030154469
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-08-14
[patent_title] => 'Apparatus and method for improved execution of a software pipeline loop procedure in a digital signal processor'
[patent_app_type] => new
[patent_app_number] => 10/225036
[patent_app_country] => US
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[pdf_file] => publications/A1/0154/20030154469.pdf
[firstpage_image] =>[orig_patent_app_number] => 10225036
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/225036 | Apparatus and method for improved execution of a software pipeline loop procedure in a digital signal processor | Aug 20, 2002 | Abandoned |
Array
(
[id] => 792710
[patent_doc_number] => 06986029
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-01-10
[patent_title] => 'Micro-controller for reading out compressed instruction code and program memory for compressing instruction code and storing therein'
[patent_app_type] => utility
[patent_app_number] => 10/201249
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/201249 | Micro-controller for reading out compressed instruction code and program memory for compressing instruction code and storing therein | Jul 23, 2002 | Issued |
Array
(
[id] => 6265438
[patent_doc_number] => 20020188829
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[patent_issue_date] => 2002-12-12
[patent_title] => 'System and method for handling load and/or store operations in a superscalar microprocessor'
[patent_app_type] => new
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/190703 | System and method for handling load and/or store operations in a superscalar microprocessor | Jul 8, 2002 | Issued |
| 10/070035 | Branch instructions in a multithreaded parallel processing system | Jul 2, 2002 | Abandoned |
Array
(
[id] => 6810400
[patent_doc_number] => 20030200339
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[patent_issue_date] => 2003-10-23
[patent_title] => 'Communications system using rings architecture'
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[firstpage_image] =>[orig_patent_app_number] => 10064336
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/064336 | Communications system using rings architecture | Jul 1, 2002 | Abandoned |
Array
(
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[patent_title] => 'Communications system using rings architecture'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/185007 | System and method for handling load and/or store operations in a superscalar microprocessor | Jun 30, 2002 | Issued |
Array
(
[id] => 7445395
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/184333 | Virtual register set expanding processor internal storage | Jun 27, 2002 | Issued |
Array
(
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[patent_title] => 'Method for reducing the latency of a branch target calculation by linking the branch target address cache with the call-return stack'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/186935 | Method for reducing the latency of a branch target calculation by linking the branch target address cache with the call-return stack | Jun 27, 2002 | Abandoned |
Array
(
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[patent_title] => 'Methods and apparatuses for executing threads'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/185210 | Methods and apparatuses for executing threads | Jun 26, 2002 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/159300 | Opcode numbering for meta-data encoding | May 30, 2002 | Abandoned |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/159763 | Center focused single instruction multiple data (SIMD) array system | May 29, 2002 | Issued |