Search

Daniel H. Pan

Examiner (ID: 721, Phone: (571)272-4172 , Office: P/2182 )

Most Active Art Unit
2182
Art Unit(s)
2182, 2183, 2302, 2783, 2315, 2899
Total Applications
1471
Issued Applications
1281
Pending Applications
50
Abandoned Applications
145

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1298152 [patent_doc_number] => 06631459 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-07 [patent_title] => 'Extended instruction word folding apparatus' [patent_app_type] => B1 [patent_app_number] => 09/644642 [patent_app_country] => US [patent_app_date] => 2000-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5793 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/631/06631459.pdf [firstpage_image] =>[orig_patent_app_number] => 09644642 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/644642
Extended instruction word folding apparatus Aug 23, 2000 Issued
Array ( [id] => 1279662 [patent_doc_number] => 06654877 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-25 [patent_title] => 'System and method for selectively executing computer code' [patent_app_type] => B1 [patent_app_number] => 09/644435 [patent_app_country] => US [patent_app_date] => 2000-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4598 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/654/06654877.pdf [firstpage_image] =>[orig_patent_app_number] => 09644435 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/644435
System and method for selectively executing computer code Aug 22, 2000 Issued
Array ( [id] => 1292019 [patent_doc_number] => 06643769 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'System and method for enabling selective execution of computer code' [patent_app_type] => B1 [patent_app_number] => 09/644315 [patent_app_country] => US [patent_app_date] => 2000-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4596 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/643/06643769.pdf [firstpage_image] =>[orig_patent_app_number] => 09644315 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/644315
System and method for enabling selective execution of computer code Aug 22, 2000 Issued
Array ( [id] => 1462461 [patent_doc_number] => 06427203 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-30 [patent_title] => 'Accurate high speed digital signal processor' [patent_app_type] => B1 [patent_app_number] => 09/643373 [patent_app_country] => US [patent_app_date] => 2000-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3241 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/427/06427203.pdf [firstpage_image] =>[orig_patent_app_number] => 09643373 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/643373
Accurate high speed digital signal processor Aug 21, 2000 Issued
Array ( [id] => 1225708 [patent_doc_number] => 06704860 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-09 [patent_title] => 'Data processing system and method for fetching instruction blocks in response to a detected block sequence' [patent_app_type] => B1 [patent_app_number] => 09/626249 [patent_app_country] => US [patent_app_date] => 2000-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4916 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/704/06704860.pdf [firstpage_image] =>[orig_patent_app_number] => 09626249 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/626249
Data processing system and method for fetching instruction blocks in response to a detected block sequence Jul 25, 2000 Issued
Array ( [id] => 1214439 [patent_doc_number] => 06715062 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-30 [patent_title] => 'Processor and method for performing a hardware test during instruction execution in a normal mode' [patent_app_type] => B1 [patent_app_number] => 09/626248 [patent_app_country] => US [patent_app_date] => 2000-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5491 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/715/06715062.pdf [firstpage_image] =>[orig_patent_app_number] => 09626248 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/626248
Processor and method for performing a hardware test during instruction execution in a normal mode Jul 25, 2000 Issued
Array ( [id] => 1214437 [patent_doc_number] => 06715061 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-30 [patent_title] => 'Multimedia-instruction acceleration device for increasing efficiency and method for the same' [patent_app_type] => B1 [patent_app_number] => 09/614542 [patent_app_country] => US [patent_app_date] => 2000-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2537 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/715/06715061.pdf [firstpage_image] =>[orig_patent_app_number] => 09614542 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/614542
Multimedia-instruction acceleration device for increasing efficiency and method for the same Jul 11, 2000 Issued
Array ( [id] => 4400361 [patent_doc_number] => 06304952 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Information processing apparatus and information processing method' [patent_app_type] => 1 [patent_app_number] => 9/613493 [patent_app_country] => US [patent_app_date] => 2000-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 9758 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/304/06304952.pdf [firstpage_image] =>[orig_patent_app_number] => 613493 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/613493
Information processing apparatus and information processing method Jul 10, 2000 Issued
Array ( [id] => 1179166 [patent_doc_number] => 06757813 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-29 [patent_title] => 'Processor' [patent_app_type] => B1 [patent_app_number] => 09/602057 [patent_app_country] => US [patent_app_date] => 2000-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 3374 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/757/06757813.pdf [firstpage_image] =>[orig_patent_app_number] => 09602057 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/602057
Processor Jun 22, 2000 Issued
Array ( [id] => 7638602 [patent_doc_number] => 06397319 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Process for executing highly efficient VLIW' [patent_app_type] => B1 [patent_app_number] => 09/598397 [patent_app_country] => US [patent_app_date] => 2000-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 27 [patent_no_of_words] => 10133 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/397/06397319.pdf [firstpage_image] =>[orig_patent_app_number] => 09598397 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/598397
Process for executing highly efficient VLIW Jun 19, 2000 Issued
Array ( [id] => 1181193 [patent_doc_number] => 06754811 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-22 [patent_title] => 'Operating system device centric agent' [patent_app_type] => B1 [patent_app_number] => 09/595974 [patent_app_country] => US [patent_app_date] => 2000-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3787 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/754/06754811.pdf [firstpage_image] =>[orig_patent_app_number] => 09595974 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/595974
Operating system device centric agent Jun 15, 2000 Issued
Array ( [id] => 1129655 [patent_doc_number] => 06795908 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-21 [patent_title] => 'Method and apparatus for instruction execution in a data processing system' [patent_app_type] => B1 [patent_app_number] => 09/591938 [patent_app_country] => US [patent_app_date] => 2000-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 26 [patent_no_of_words] => 18920 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/795/06795908.pdf [firstpage_image] =>[orig_patent_app_number] => 09591938 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/591938
Method and apparatus for instruction execution in a data processing system Jun 11, 2000 Issued
Array ( [id] => 1201045 [patent_doc_number] => 06728873 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-27 [patent_title] => 'System and method for providing multiprocessor speculation within a speculative branch path' [patent_app_type] => B1 [patent_app_number] => 09/588507 [patent_app_country] => US [patent_app_date] => 2000-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 9513 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/728/06728873.pdf [firstpage_image] =>[orig_patent_app_number] => 09588507 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/588507
System and method for providing multiprocessor speculation within a speculative branch path Jun 5, 2000 Issued
Array ( [id] => 1184801 [patent_doc_number] => 06748518 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-08 [patent_title] => 'Multi-level multiprocessor speculation mechanism' [patent_app_type] => B1 [patent_app_number] => 09/588483 [patent_app_country] => US [patent_app_date] => 2000-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 9517 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/748/06748518.pdf [firstpage_image] =>[orig_patent_app_number] => 09588483 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/588483
Multi-level multiprocessor speculation mechanism Jun 5, 2000 Issued
Array ( [id] => 641166 [patent_doc_number] => 07127590 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-10-24 [patent_title] => 'Reconfigurable VLIW processor' [patent_app_type] => utility [patent_app_number] => 09/587052 [patent_app_country] => US [patent_app_date] => 2000-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4904 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/127/07127590.pdf [firstpage_image] =>[orig_patent_app_number] => 09587052 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/587052
Reconfigurable VLIW processor Jun 1, 2000 Issued
Array ( [id] => 1311480 [patent_doc_number] => 06625726 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-23 [patent_title] => 'Method and apparatus for fault handling in computer systems' [patent_app_type] => B1 [patent_app_number] => 09/587114 [patent_app_country] => US [patent_app_date] => 2000-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8129 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/625/06625726.pdf [firstpage_image] =>[orig_patent_app_number] => 09587114 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/587114
Method and apparatus for fault handling in computer systems Jun 1, 2000 Issued
Array ( [id] => 1210400 [patent_doc_number] => 06718456 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-06 [patent_title] => 'Parallel pack instruction method and apparatus' [patent_app_type] => B1 [patent_app_number] => 09/587177 [patent_app_country] => US [patent_app_date] => 2000-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3051 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/718/06718456.pdf [firstpage_image] =>[orig_patent_app_number] => 09587177 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/587177
Parallel pack instruction method and apparatus Jun 1, 2000 Issued
Array ( [id] => 1573805 [patent_doc_number] => 06499100 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-24 [patent_title] => 'Enhanced instruction decoding' [patent_app_type] => B1 [patent_app_number] => 09/580499 [patent_app_country] => US [patent_app_date] => 2000-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 28 [patent_no_of_words] => 10059 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/499/06499100.pdf [firstpage_image] =>[orig_patent_app_number] => 09580499 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/580499
Enhanced instruction decoding May 29, 2000 Issued
09/580384 MULTIPLE VLAN ARCHITECTURE SYSTEM May 25, 2000 Abandoned
Array ( [id] => 1161631 [patent_doc_number] => 06775760 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-10 [patent_title] => 'Integrated circuit and recording medium on which data on integrated circuit is recorded' [patent_app_type] => B1 [patent_app_number] => 09/555173 [patent_app_country] => US [patent_app_date] => 2000-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3185 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/775/06775760.pdf [firstpage_image] =>[orig_patent_app_number] => 09555173 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/555173
Integrated circuit and recording medium on which data on integrated circuit is recorded May 24, 2000 Issued
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