Daniel H. Pan

Array ( [id] => 3850512 [patent_doc_number] => 05761524 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Method and apparatus for performing and operation multiple times in response to a single instruction' [patent_app_type] => 1 [patent_app_number] => 8/616563 [patent_app_country] => US [patent_app_date] => 1996-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5278 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/761/05761524.pdf [firstpage_image] =>[orig_patent_app_number] => 616563 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3910840 [patent_doc_number] => 05835782 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-10 [patent_title] => 'Packed/add and packed subtract operations' [patent_app_type] => 1 [patent_app_number] => 8/611123 [patent_app_country] => US [patent_app_date] => 1996-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 12211 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/835/05835782.pdf [firstpage_image] =>[orig_patent_app_number] => 611123 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3893904 [patent_doc_number] => 05826000 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-20 [patent_title] => 'System and method for automatic configuration of home network computers' [patent_app_type] => 1 [patent_app_number] => 8/613432 [patent_app_country] => US [patent_app_date] => 1996-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3509 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/826/05826000.pdf [firstpage_image] =>[orig_patent_app_number] => 613432 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3695081 [patent_doc_number] => 05634072 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-27 [patent_title] => 'Method of managing resources in one or more coupling facilities coupled to one or more operating systems in one or more central programming complexes using a policy' [patent_app_type] => 1 [patent_app_number] => 8/607053 [patent_app_country] => US [patent_app_date] => 1996-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 64 [patent_no_of_words] => 43363 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/634/05634072.pdf [firstpage_image] =>[orig_patent_app_number] => 607053 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4037823 [patent_doc_number] => 05926636 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Remote procedural call component management method for a heterogeneous computer network' [patent_app_type] => 1 [patent_app_number] => 8/603531 [patent_app_country] => US [patent_app_date] => 1996-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7957 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/926/05926636.pdf [firstpage_image] =>[orig_patent_app_number] => 603531 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4020876 [patent_doc_number] => 05987498 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Credit card operated computer on-line service communication system' [patent_app_type] => 1 [patent_app_number] => 8/602630 [patent_app_country] => US [patent_app_date] => 1996-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 7539 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/987/05987498.pdf [firstpage_image] =>[orig_patent_app_number] => 602630 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3635030 [patent_doc_number] => 05689720 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-18 [patent_title] => 'High-performance superscalar-based computer system with out-of-order instruction execution' [patent_app_type] => 1 [patent_app_number] => 8/602021 [patent_app_country] => US [patent_app_date] => 1996-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 32037 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/689/05689720.pdf [firstpage_image] =>[orig_patent_app_number] => 602021 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3974852 [patent_doc_number] => 05937202 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'High-speed, parallel, processor architecture for front-end electronics, based on a single type of ASIC, and method use thereof' [patent_app_type] => 1 [patent_app_number] => 8/602132 [patent_app_country] => US [patent_app_date] => 1996-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 79 [patent_figures_cnt] => 97 [patent_no_of_words] => 59160 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/937/05937202.pdf [firstpage_image] =>[orig_patent_app_number] => 602132 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3755314 [patent_doc_number] => 05787244 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-28 [patent_title] => 'Information retrieval system' [patent_app_type] => 1 [patent_app_number] => 8/601160 [patent_app_country] => US [patent_app_date] => 1996-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7179 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/787/05787244.pdf [firstpage_image] =>[orig_patent_app_number] => 601160 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4017779 [patent_doc_number] => 05859980 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Network interface having adaptive transmit start point for each packet to avoid transmit underflow' [patent_app_type] => 1 [patent_app_number] => 8/598290 [patent_app_country] => US [patent_app_date] => 1996-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3672 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/859/05859980.pdf [firstpage_image] =>[orig_patent_app_number] => 598290 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3708549 [patent_doc_number] => 05619671 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-08 [patent_title] => 'Method and apparatus for providing token controlled access to protected pages of memory' [patent_app_type] => 1 [patent_app_number] => 8/594406 [patent_app_country] => US [patent_app_date] => 1996-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 11137 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/619/05619671.pdf [firstpage_image] =>[orig_patent_app_number] => 594406 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3760976 [patent_doc_number] => 05802278 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Bridge/router architecture for high performance scalable networking' [patent_app_type] => 1 [patent_app_number] => 8/599473 [patent_app_country] => US [patent_app_date] => 1996-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 37 [patent_no_of_words] => 30791 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/802/05802278.pdf [firstpage_image] =>[orig_patent_app_number] => 599473 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3802584 [patent_doc_number] => 05822557 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Pipelined data processing device having improved hardware control over an arithmetic operations unit' [patent_app_type] => 1 [patent_app_number] => 8/586483 [patent_app_country] => US [patent_app_date] => 1996-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 68 [patent_no_of_words] => 22032 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/822/05822557.pdf [firstpage_image] =>[orig_patent_app_number] => 586483 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4076166 [patent_doc_number] => 05896515 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-20 [patent_title] => 'Information processing apparatus' [patent_app_type] => 1 [patent_app_number] => 8/582670 [patent_app_country] => US [patent_app_date] => 1996-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 7729 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/896/05896515.pdf [firstpage_image] =>[orig_patent_app_number] => 582670 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4147581 [patent_doc_number] => 06035105 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'Multiple VLAN architecture system' [patent_app_type] => 1 [patent_app_number] => 8/582074 [patent_app_country] => US [patent_app_date] => 1996-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5302 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/035/06035105.pdf [firstpage_image] =>[orig_patent_app_number] => 582074 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3825042 [patent_doc_number] => 05710914 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-20 [patent_title] => 'Digital signal processing method and system implementing pipelined read and write operations' [patent_app_type] => 1 [patent_app_number] => 8/581320 [patent_app_country] => US [patent_app_date] => 1995-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6352 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/710/05710914.pdf [firstpage_image] =>[orig_patent_app_number] => 581320 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3758130 [patent_doc_number] => 05754788 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Method and system for reconfiguring a communications stack' [patent_app_type] => 1 [patent_app_number] => 8/579925 [patent_app_country] => US [patent_app_date] => 1995-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7955 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754788.pdf [firstpage_image] =>[orig_patent_app_number] => 579925 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3796664 [patent_doc_number] => 05758138 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'Method and system for reducing numeric counting levels in resampling control circuitry' [patent_app_type] => 1 [patent_app_number] => 8/576943 [patent_app_country] => US [patent_app_date] => 1995-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3698 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/758/05758138.pdf [firstpage_image] =>[orig_patent_app_number] => 576943 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3894070 [patent_doc_number] => 05764941 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Operating circuit and method for processing signals in ADPCM system' [patent_app_type] => 1 [patent_app_number] => 8/580085 [patent_app_country] => US [patent_app_date] => 1995-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7425 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/764/05764941.pdf [firstpage_image] =>[orig_patent_app_number] => 580085 [rel_patent_id] =>[rel_patent_doc_number] =>)