Search

Daniel H. Pan

Examiner (ID: 721, Phone: (571)272-4172 , Office: P/2182 )

Most Active Art Unit
2182
Art Unit(s)
2182, 2183, 2302, 2783, 2315, 2899
Total Applications
1471
Issued Applications
1281
Pending Applications
50
Abandoned Applications
145

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3835803 [patent_doc_number] => 05790794 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-04 [patent_title] => 'Video storage unit architecture' [patent_app_type] => 1 [patent_app_number] => 8/514013 [patent_app_country] => US [patent_app_date] => 1995-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6411 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/790/05790794.pdf [firstpage_image] =>[orig_patent_app_number] => 514013 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/514013
Video storage unit architecture Aug 10, 1995 Issued
Array ( [id] => 3761112 [patent_doc_number] => 05717927 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-10 [patent_title] => 'Telephone operating as a telecommunications terminal' [patent_app_type] => 1 [patent_app_number] => 8/506832 [patent_app_country] => US [patent_app_date] => 1995-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1640 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/717/05717927.pdf [firstpage_image] =>[orig_patent_app_number] => 506832 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/506832
Telephone operating as a telecommunications terminal Jul 24, 1995 Issued
Array ( [id] => 3849091 [patent_doc_number] => 05740463 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Information processing system and method of computation performed with an information processing system' [patent_app_type] => 1 [patent_app_number] => 8/504583 [patent_app_country] => US [patent_app_date] => 1995-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 79 [patent_no_of_words] => 51449 [patent_no_of_claims] => 77 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/740/05740463.pdf [firstpage_image] =>[orig_patent_app_number] => 504583 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/504583
Information processing system and method of computation performed with an information processing system Jul 19, 1995 Issued
Array ( [id] => 3839692 [patent_doc_number] => 05732261 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-24 [patent_title] => 'Method of using an object-oriented communication system with support for multiple remote machine types' [patent_app_type] => 1 [patent_app_number] => 8/504120 [patent_app_country] => US [patent_app_date] => 1995-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10408 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/732/05732261.pdf [firstpage_image] =>[orig_patent_app_number] => 504120 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/504120
Method of using an object-oriented communication system with support for multiple remote machine types Jul 18, 1995 Issued
Array ( [id] => 3756360 [patent_doc_number] => 05787310 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-28 [patent_title] => 'Microcomputer' [patent_app_type] => 1 [patent_app_number] => 8/500039 [patent_app_country] => US [patent_app_date] => 1995-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 60 [patent_no_of_words] => 8873 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/787/05787310.pdf [firstpage_image] =>[orig_patent_app_number] => 500039 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/500039
Microcomputer Jul 9, 1995 Issued
Array ( [id] => 3768405 [patent_doc_number] => 05721944 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-24 [patent_title] => 'Method and system for implementing relative time discriminations in a high speed data transmission network' [patent_app_type] => 1 [patent_app_number] => 8/498133 [patent_app_country] => US [patent_app_date] => 1995-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 3450 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/721/05721944.pdf [firstpage_image] =>[orig_patent_app_number] => 498133 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/498133
Method and system for implementing relative time discriminations in a high speed data transmission network Jul 4, 1995 Issued
Array ( [id] => 3811604 [patent_doc_number] => 05781741 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-14 [patent_title] => 'Message communications system in a parallel computer' [patent_app_type] => 1 [patent_app_number] => 8/496781 [patent_app_country] => US [patent_app_date] => 1995-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 5173 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 20 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/781/05781741.pdf [firstpage_image] =>[orig_patent_app_number] => 496781 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/496781
Message communications system in a parallel computer Jun 28, 1995 Issued
Array ( [id] => 3742460 [patent_doc_number] => 05671435 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-23 [patent_title] => 'Technique for software to identify features implemented in a processor' [patent_app_type] => 1 [patent_app_number] => 8/496259 [patent_app_country] => US [patent_app_date] => 1995-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3570 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/671/05671435.pdf [firstpage_image] =>[orig_patent_app_number] => 496259 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/496259
Technique for software to identify features implemented in a processor Jun 27, 1995 Issued
Array ( [id] => 3565754 [patent_doc_number] => 05544088 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-06 [patent_title] => 'Method of I/O pin assignment in a hierarchial packaging system' [patent_app_type] => 1 [patent_app_number] => 8/492415 [patent_app_country] => US [patent_app_date] => 1995-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 4671 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 362 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/544/05544088.pdf [firstpage_image] =>[orig_patent_app_number] => 492415 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/492415
Method of I/O pin assignment in a hierarchial packaging system Jun 18, 1995 Issued
Array ( [id] => 3633763 [patent_doc_number] => 05689640 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-18 [patent_title] => 'Method and system for downloading data to network nodes' [patent_app_type] => 1 [patent_app_number] => 8/490551 [patent_app_country] => US [patent_app_date] => 1995-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 3297 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/689/05689640.pdf [firstpage_image] =>[orig_patent_app_number] => 490551 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/490551
Method and system for downloading data to network nodes Jun 14, 1995 Issued
Array ( [id] => 3544676 [patent_doc_number] => 05584034 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-10 [patent_title] => 'Apparatus for executing respective portions of a process by main and sub CPUS' [patent_app_type] => 1 [patent_app_number] => 8/486606 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 60 [patent_figures_cnt] => 66 [patent_no_of_words] => 34981 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/584/05584034.pdf [firstpage_image] =>[orig_patent_app_number] => 486606 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/486606
Apparatus for executing respective portions of a process by main and sub CPUS Jun 6, 1995 Issued
Array ( [id] => 3839914 [patent_doc_number] => 05732277 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-24 [patent_title] => 'Graphical system for modelling a process and associated method' [patent_app_type] => 1 [patent_app_number] => 8/477073 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 64 [patent_figures_cnt] => 125 [patent_no_of_words] => 26766 [patent_no_of_claims] => 139 [patent_no_of_ind_claims] => 27 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/732/05732277.pdf [firstpage_image] =>[orig_patent_app_number] => 477073 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/477073
Graphical system for modelling a process and associated method Jun 6, 1995 Issued
Array ( [id] => 3676240 [patent_doc_number] => 05625838 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-29 [patent_title] => 'Microcomputer system for digital signal processing' [patent_app_type] => 1 [patent_app_number] => 8/482474 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 31 [patent_no_of_words] => 22354 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/625/05625838.pdf [firstpage_image] =>[orig_patent_app_number] => 482474 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/482474
Microcomputer system for digital signal processing Jun 6, 1995 Issued
Array ( [id] => 3633907 [patent_doc_number] => 05615383 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-25 [patent_title] => 'Microcomputer system for digital signal processing' [patent_app_type] => 1 [patent_app_number] => 8/474606 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 31 [patent_no_of_words] => 22291 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/615/05615383.pdf [firstpage_image] =>[orig_patent_app_number] => 474606 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/474606
Microcomputer system for digital signal processing Jun 6, 1995 Issued
Array ( [id] => 3796102 [patent_doc_number] => 05819026 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'System and method for arbitrating accelerator requests' [patent_app_type] => 1 [patent_app_number] => 8/473279 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2883 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/819/05819026.pdf [firstpage_image] =>[orig_patent_app_number] => 473279 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/473279
System and method for arbitrating accelerator requests Jun 5, 1995 Issued
Array ( [id] => 3600835 [patent_doc_number] => 05553309 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-03 [patent_title] => 'Device for high speed evaluation of logical expressions and high speed vector operations' [patent_app_type] => 1 [patent_app_number] => 8/465902 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 9045 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/553/05553309.pdf [firstpage_image] =>[orig_patent_app_number] => 465902 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/465902
Device for high speed evaluation of logical expressions and high speed vector operations Jun 5, 1995 Issued
Array ( [id] => 3547658 [patent_doc_number] => 05557763 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-17 [patent_title] => 'System for handling load and/or store operations in a superscalar microprocessor' [patent_app_type] => 1 [patent_app_number] => 8/465238 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10819 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/557/05557763.pdf [firstpage_image] =>[orig_patent_app_number] => 465238 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/465238
System for handling load and/or store operations in a superscalar microprocessor Jun 4, 1995 Issued
Array ( [id] => 3701430 [patent_doc_number] => 05644780 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Multiple port high speed register file with interleaved write ports for use with very long instruction word (vlin) and n-way superscaler processors' [patent_app_type] => 1 [patent_app_number] => 8/459490 [patent_app_country] => US [patent_app_date] => 1995-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2915 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644780.pdf [firstpage_image] =>[orig_patent_app_number] => 459490 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/459490
Multiple port high speed register file with interleaved write ports for use with very long instruction word (vlin) and n-way superscaler processors Jun 1, 1995 Issued
Array ( [id] => 3742417 [patent_doc_number] => 05671432 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-23 [patent_title] => 'Programmable array I/O-routing resource' [patent_app_type] => 1 [patent_app_number] => 8/460420 [patent_app_country] => US [patent_app_date] => 1995-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5259 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/671/05671432.pdf [firstpage_image] =>[orig_patent_app_number] => 460420 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/460420
Programmable array I/O-routing resource Jun 1, 1995 Issued
Array ( [id] => 3768075 [patent_doc_number] => 05721921 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-24 [patent_title] => 'Barrier and eureka synchronization architecture for multiprocessors' [patent_app_type] => 1 [patent_app_number] => 8/450251 [patent_app_country] => US [patent_app_date] => 1995-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 27 [patent_no_of_words] => 11148 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/721/05721921.pdf [firstpage_image] =>[orig_patent_app_number] => 450251 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/450251
Barrier and eureka synchronization architecture for multiprocessors May 24, 1995 Issued
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