Search

Daniel H. Pan

Examiner (ID: 721, Phone: (571)272-4172 , Office: P/2182 )

Most Active Art Unit
2182
Art Unit(s)
2182, 2183, 2302, 2783, 2315, 2899
Total Applications
1471
Issued Applications
1281
Pending Applications
50
Abandoned Applications
145

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3495917 [patent_doc_number] => 05446914 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-29 [patent_title] => 'Twisted pair and attachment unit interface (AUI) coding and transceiving circuit with full duplex, testing, and isolation modes' [patent_app_type] => 1 [patent_app_number] => 7/995598 [patent_app_country] => US [patent_app_date] => 1992-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 27 [patent_no_of_words] => 10319 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/446/05446914.pdf [firstpage_image] =>[orig_patent_app_number] => 995598 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/995598
Twisted pair and attachment unit interface (AUI) coding and transceiving circuit with full duplex, testing, and isolation modes Dec 21, 1992 Issued
Array ( [id] => 3487432 [patent_doc_number] => 05428805 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-27 [patent_title] => 'Method and apparatus for recognizing and performing handwritten calculations' [patent_app_type] => 1 [patent_app_number] => 7/994950 [patent_app_country] => US [patent_app_date] => 1992-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 81 [patent_figures_cnt] => 153 [patent_no_of_words] => 24373 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/428/05428805.pdf [firstpage_image] =>[orig_patent_app_number] => 994950 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/994950
Method and apparatus for recognizing and performing handwritten calculations Dec 21, 1992 Issued
Array ( [id] => 3121392 [patent_doc_number] => 05418976 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-23 [patent_title] => 'Processing system having a storage set with data designating operation state from operation states in instruction memory set with application specific block' [patent_app_type] => 1 [patent_app_number] => 7/994179 [patent_app_country] => US [patent_app_date] => 1992-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6441 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/418/05418976.pdf [firstpage_image] =>[orig_patent_app_number] => 994179 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/994179
Processing system having a storage set with data designating operation state from operation states in instruction memory set with application specific block Dec 20, 1992 Issued
07/994071 A COMMUNICATION CONTROL DEVICE AND METHOD FOR AUTOMATICALLY DETERMINING A SELF-ADDRESS Dec 20, 1992 Abandoned
Array ( [id] => 3495903 [patent_doc_number] => 05446913 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-29 [patent_title] => 'Method and system for nonsequential execution of intermixed scalar and vector instructions in a data processing system utilizing a finish instruction array' [patent_app_type] => 1 [patent_app_number] => 7/991665 [patent_app_country] => US [patent_app_date] => 1992-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3262 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/446/05446913.pdf [firstpage_image] =>[orig_patent_app_number] => 991665 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/991665
Method and system for nonsequential execution of intermixed scalar and vector instructions in a data processing system utilizing a finish instruction array Dec 15, 1992 Issued
07/986175 PARALLEL COMPUTER SYSTEM PROVIDING MULT-PORTED INTELLIGENT MEMORY Dec 3, 1992 Abandoned
Array ( [id] => 2989804 [patent_doc_number] => 05257358 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-26 [patent_title] => 'Method for counting the number of program instruction completed by a microprocessor' [patent_app_type] => 1 [patent_app_number] => 7/979347 [patent_app_country] => US [patent_app_date] => 1992-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 9416 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/257/05257358.pdf [firstpage_image] =>[orig_patent_app_number] => 979347 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/979347
Method for counting the number of program instruction completed by a microprocessor Nov 19, 1992 Issued
Array ( [id] => 3139057 [patent_doc_number] => 05437043 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-25 [patent_title] => 'Information processing apparatus having a register file used interchangeably both as scalar registers of register windows and as vector registers' [patent_app_type] => 1 [patent_app_number] => 7/979327 [patent_app_country] => US [patent_app_date] => 1992-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10851 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/437/05437043.pdf [firstpage_image] =>[orig_patent_app_number] => 979327 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/979327
Information processing apparatus having a register file used interchangeably both as scalar registers of register windows and as vector registers Nov 19, 1992 Issued
Array ( [id] => 3708676 [patent_doc_number] => 05680631 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-21 [patent_title] => 'Data processor with on-chip cache memory and purge controller responsive to external signal for controlling access to the cache memory' [patent_app_type] => 1 [patent_app_number] => 7/978069 [patent_app_country] => US [patent_app_date] => 1992-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 8292 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/680/05680631.pdf [firstpage_image] =>[orig_patent_app_number] => 978069 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/978069
Data processor with on-chip cache memory and purge controller responsive to external signal for controlling access to the cache memory Nov 17, 1992 Issued
Array ( [id] => 3053624 [patent_doc_number] => 05377358 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-27 [patent_title] => 'Character processing device adapted to perform document-editing processing and typewriting processing' [patent_app_type] => 1 [patent_app_number] => 7/978157 [patent_app_country] => US [patent_app_date] => 1992-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3212 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/377/05377358.pdf [firstpage_image] =>[orig_patent_app_number] => 978157 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/978157
Character processing device adapted to perform document-editing processing and typewriting processing Nov 16, 1992 Issued
Array ( [id] => 3439030 [patent_doc_number] => 05404557 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-04 [patent_title] => 'Data processor with plural instruction execution parts for synchronized parallel processing and exception handling' [patent_app_type] => 1 [patent_app_number] => 7/977880 [patent_app_country] => US [patent_app_date] => 1992-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 12007 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/404/05404557.pdf [firstpage_image] =>[orig_patent_app_number] => 977880 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/977880
Data processor with plural instruction execution parts for synchronized parallel processing and exception handling Nov 16, 1992 Issued
07/976346 APPARATUS FOR RELOCATING SPATIAL INFORMATION FOR USE IN DATA EXCHANGE IN A PARALLEL PROCESSING ENVIRONMENT Nov 12, 1992 Abandoned
Array ( [id] => 3123096 [patent_doc_number] => 05408672 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-18 [patent_title] => 'Microcomputer having ROM to store a program and RAM to store changes to the program' [patent_app_type] => 1 [patent_app_number] => 7/976400 [patent_app_country] => US [patent_app_date] => 1992-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 36 [patent_no_of_words] => 13536 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/408/05408672.pdf [firstpage_image] =>[orig_patent_app_number] => 976400 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/976400
Microcomputer having ROM to store a program and RAM to store changes to the program Nov 12, 1992 Issued
07/972020 DEVICE FOR EVALUATING LOGICAL EXPRESSION AND VECTOR OPERATION DEVICE Nov 8, 1992 Abandoned
Array ( [id] => 3497888 [patent_doc_number] => 05426783 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-20 [patent_title] => 'System for processing eight bytes or less by the move, pack and unpack instruction of the ESA/390 instruction set' [patent_app_type] => 1 [patent_app_number] => 7/970418 [patent_app_country] => US [patent_app_date] => 1992-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6354 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/426/05426783.pdf [firstpage_image] =>[orig_patent_app_number] => 970418 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/970418
System for processing eight bytes or less by the move, pack and unpack instruction of the ESA/390 instruction set Nov 1, 1992 Issued
07/967942 A DATA PROCESSING DEVICE WITH A CONDITIONING INSTRUCTION FOR CONTROLLING EXECUTION OF INSTRUCTIONS ACCORDING TO STATUS CONDITIONS Oct 27, 1992 Abandoned
Array ( [id] => 3082724 [patent_doc_number] => 05361371 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-01 [patent_title] => 'Microprocessor with reset execution from an arbitrary address' [patent_app_type] => 1 [patent_app_number] => 7/966123 [patent_app_country] => US [patent_app_date] => 1992-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5408 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 320 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/361/05361371.pdf [firstpage_image] =>[orig_patent_app_number] => 966123 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/966123
Microprocessor with reset execution from an arbitrary address Oct 21, 1992 Issued
Array ( [id] => 3121358 [patent_doc_number] => 05418974 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-23 [patent_title] => 'Circuit design method and system therefor' [patent_app_type] => 1 [patent_app_number] => 7/958389 [patent_app_country] => US [patent_app_date] => 1992-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 2662 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/418/05418974.pdf [firstpage_image] =>[orig_patent_app_number] => 958389 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/958389
Circuit design method and system therefor Oct 7, 1992 Issued
07/956575 ELECTRONIC EQUIPMENT INCLUDING MEANS FOR CONTROLLING READING OF CONTROL PROGRAMS Oct 4, 1992 Abandoned
Array ( [id] => 3128202 [patent_doc_number] => 05396634 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-07 [patent_title] => 'Method and apparatus for increasing the decoding speed of a microprocessor' [patent_app_type] => 1 [patent_app_number] => 7/954749 [patent_app_country] => US [patent_app_date] => 1992-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4059 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/396/05396634.pdf [firstpage_image] =>[orig_patent_app_number] => 954749 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/954749
Method and apparatus for increasing the decoding speed of a microprocessor Sep 29, 1992 Issued
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