| Application number | Title of the application | Filing Date | Status |
|---|
| 07/954084 | SYSTEM AND METHOD FOR HANDLING LOAD AND/OR STORE OPERATIONS IN A SUPERCALAR MICROPROCESSOR | Sep 28, 1992 | Abandoned |
Array
(
[id] => 3503409
[patent_doc_number] => 05440756
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-08
[patent_title] => 'Apparatus and method for real-time extraction and display of musical chord sequences from an audio signal'
[patent_app_type] => 1
[patent_app_number] => 7/951397
[patent_app_country] => US
[patent_app_date] => 1992-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 18
[patent_no_of_words] => 4999
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/440/05440756.pdf
[firstpage_image] =>[orig_patent_app_number] => 951397
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/951397 | Apparatus and method for real-time extraction and display of musical chord sequences from an audio signal | Sep 27, 1992 | Issued |
Array
(
[id] => 3439613
[patent_doc_number] => 05455955
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-03
[patent_title] => 'Data processing system with device for arranging instructions'
[patent_app_type] => 1
[patent_app_number] => 7/951772
[patent_app_country] => US
[patent_app_date] => 1992-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 42
[patent_figures_cnt] => 52
[patent_no_of_words] => 12605
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/455/05455955.pdf
[firstpage_image] =>[orig_patent_app_number] => 951772
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/951772 | Data processing system with device for arranging instructions | Sep 27, 1992 | Issued |
Array
(
[id] => 3436047
[patent_doc_number] => 05423051
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-06-06
[patent_title] => 'Execution unit with an integrated vector operation capability'
[patent_app_type] => 1
[patent_app_number] => 7/951490
[patent_app_country] => US
[patent_app_date] => 1992-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6732
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/423/05423051.pdf
[firstpage_image] =>[orig_patent_app_number] => 951490
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/951490 | Execution unit with an integrated vector operation capability | Sep 23, 1992 | Issued |
| 07/949980 | DUAL LANE COMPUTING SYSTEM WITH SIMULATION ON DETECTION OF DISCREPANCY | Sep 23, 1992 | Abandoned |
| 07/947215 | APPARATUS FOR IMPLEMENTING INTERRUPTS IN PIPELINED PROCESSORS | Sep 17, 1992 | Abandoned |
Array
(
[id] => 3836471
[patent_doc_number] => 05790834
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-04
[patent_title] => 'Apparatus and method using an ID instruction to identify a computer microprocessor'
[patent_app_type] => 1
[patent_app_number] => 7/938288
[patent_app_country] => US
[patent_app_date] => 1992-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 6877
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/790/05790834.pdf
[firstpage_image] =>[orig_patent_app_number] => 938288
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/938288 | Apparatus and method using an ID instruction to identify a computer microprocessor | Aug 30, 1992 | Issued |
| 07/927580 | APPARATUS AND METHOD FOR MODIFYING INSTRUCTION LENGTH DECODING IN A COMPUTER PROCESSOR | Aug 9, 1992 | Abandoned |
Array
(
[id] => 2908648
[patent_doc_number] => 05241684
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-31
[patent_title] => 'Data processor for processing data singly or in an array'
[patent_app_type] => 1
[patent_app_number] => 7/925296
[patent_app_country] => US
[patent_app_date] => 1992-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 2763
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 248
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/241/05241684.pdf
[firstpage_image] =>[orig_patent_app_number] => 925296
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/925296 | Data processor for processing data singly or in an array | Aug 5, 1992 | Issued |
Array
(
[id] => 3460050
[patent_doc_number] => 05386519
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-31
[patent_title] => 'Information processing apparatus incorporating buffer storing a plurality of branch target instructions for branch instructions and interrupt requests'
[patent_app_type] => 1
[patent_app_number] => 7/917286
[patent_app_country] => US
[patent_app_date] => 1992-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 6925
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 386
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/386/05386519.pdf
[firstpage_image] =>[orig_patent_app_number] => 917286
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/917286 | Information processing apparatus incorporating buffer storing a plurality of branch target instructions for branch instructions and interrupt requests | Jul 22, 1992 | Issued |
| 07/905988 | PARALLEL PROCESSING WITH IMPROVED INSTRUCTION MISALIGNMENT DETECTION | Jun 28, 1992 | Abandoned |
Array
(
[id] => 3089768
[patent_doc_number] => 05297259
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-03-22
[patent_title] => 'Information processing system for transmitting information from one apparatus to another'
[patent_app_type] => 1
[patent_app_number] => 7/902790
[patent_app_country] => US
[patent_app_date] => 1992-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 3104
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/297/05297259.pdf
[firstpage_image] =>[orig_patent_app_number] => 902790
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/902790 | Information processing system for transmitting information from one apparatus to another | Jun 23, 1992 | Issued |
| 07/902941 | COMMAND PERFORMING ORDER CHANGE-OVER SYSTEM BASED ON INFORMATION CONTAINED IN EXECUTED COMMAND IN A DATA PROCESSOR | Jun 22, 1992 | Abandoned |
Array
(
[id] => 3439014
[patent_doc_number] => 05404556
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-04
[patent_title] => 'Apparatus for carrying out asynchronous communication among integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 7/899266
[patent_app_country] => US
[patent_app_date] => 1992-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 15
[patent_no_of_words] => 10355
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 270
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/404/05404556.pdf
[firstpage_image] =>[orig_patent_app_number] => 899266
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/899266 | Apparatus for carrying out asynchronous communication among integrated circuits | Jun 14, 1992 | Issued |
| 07/896881 | PROCESSING SYSTEM HAVING A STORAGE SET WITH DATA DESIGNATING OPERATION STATE FROM OPERATION STATES IN INSTRUCTION MEMORY SET WITH APPLICATION SPECIFIC BLOCK | Jun 9, 1992 | Abandoned |
| 07/889385 | A VEHICLE CONTROL SYSTEM HAVING PROGRAM GENERATOR AND CONVERTOR | May 27, 1992 | Abandoned |
Array
(
[id] => 3601683
[patent_doc_number] => 05517653
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-14
[patent_title] => 'Semiconductor integrated circuit device which controls the activation of a microprogram and the start address'
[patent_app_type] => 1
[patent_app_number] => 7/888326
[patent_app_country] => US
[patent_app_date] => 1992-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 5251
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/517/05517653.pdf
[firstpage_image] =>[orig_patent_app_number] => 888326
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/888326 | Semiconductor integrated circuit device which controls the activation of a microprogram and the start address | May 25, 1992 | Issued |
Array
(
[id] => 3505403
[patent_doc_number] => 05537556
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-16
[patent_title] => 'System and method for interfacing a CPU to a video controller'
[patent_app_type] => 1
[patent_app_number] => 7/888683
[patent_app_country] => US
[patent_app_date] => 1992-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5690
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/537/05537556.pdf
[firstpage_image] =>[orig_patent_app_number] => 888683
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/888683 | System and method for interfacing a CPU to a video controller | May 21, 1992 | Issued |
| 07/884258 | CONTROLLING REQUEST FOR ACCESS TO RESOURCES MADE BY MULTIPLE PROCESSORS OVER A SHARED BUS | May 7, 1992 | Abandoned |
Array
(
[id] => 3503391
[patent_doc_number] => 05440755
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-08
[patent_title] => 'Computer system with a processor-direct universal bus connector and interchangeable bus translator'
[patent_app_type] => 1
[patent_app_number] => 7/862989
[patent_app_country] => US
[patent_app_date] => 1992-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 2352
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/440/05440755.pdf
[firstpage_image] =>[orig_patent_app_number] => 862989
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/862989 | Computer system with a processor-direct universal bus connector and interchangeable bus translator | Apr 5, 1992 | Issued |