| Application number | Title of the application | Filing Date | Status |
|---|
| 07/858389 | MEMORY PROCESSOR THAT PREVENTS ERRORS WHEN LOAD INSTRUCTIONS ARE MOVED IN THE EXECUTION SEQUENCE | Mar 24, 1992 | Abandoned |
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| 07/839686 | ELECTRONIC EQUIPMENT HAVING CONTROLLABLE ACCESS TIMES FOR DETACHABLE CARTRIDGES | Feb 23, 1992 | Abandoned |
| 07/837787 | MICROCOMPUTER FOR DIGITAL SIGNAL PROCESSING HAVING ON-CHIP MEMORY AND SEPARATE OOF-CHIP DATA TRANSFER AND ADDRESSING | Feb 17, 1992 | Abandoned |
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| 07/826654 | PROGRAMMABLE PEER PROTOCOL APPLIANCE CONTROLLER | Jan 20, 1992 | Abandoned |
| 07/814449 | A PROCESSOR FOR DATA TRANSMITTED IN ACCORDANCE WITH A PLURALITY OF TRANSMISSION METHODS, WHICH GENERATES OUTPUT DATA APPLICABLE TO THE OUTPUT DEVICE | Dec 29, 1991 | Abandoned |
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| 07/790008 | PROGRAMMABLE MICROCONTROLLER ARCHITECTURE FOR DISK DRIVE SYSTEM | Nov 3, 1991 | Abandoned |
| 07/777649 | AN APPARATUS FOR FURNISHING INSTRUCTIONS IN A MICROPROCESSOR WITH A MULTI-STAGE PIPELINE PROCESSING UNIT FOR PROCESSING INSTRUCTION PHASE AND HAVING A MEMORY AND AT LEAST THREE ADDITIONAL MEMORY UNITS | Oct 14, 1991 | Abandoned |
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[patent_issue_date] => 1996-09-03
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| 07/752151 | IMPROVED METHOD FOR PROCESSING CHECKPOINT INSTRUCTIONS TO ALLOW CONCURRENT EXECUTION OF OVERLAPPING INSTRUCTIONS | Aug 28, 1991 | Abandoned |
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