Daniel H. Pan

Array ( [id] => 2992495 [patent_doc_number] => 05253349 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-12 [patent_title] => 'Decreasing processing time for type 1 dyadic instructions' [patent_app_type] => 1 [patent_app_number] => 7/647966 [patent_app_country] => US [patent_app_date] => 1991-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1460 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/253/05253349.pdf [firstpage_image] =>[orig_patent_app_number] => 647966 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2815667 [patent_doc_number] => 05115499 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-19 [patent_title] => 'Shared computer resource allocation system having apparatus for informing a requesting computer of the identity and busy/idle status of shared resources by command code' [patent_app_type] => 1 [patent_app_number] => 7/635396 [patent_app_country] => US [patent_app_date] => 1991-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7813 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 313 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/115/05115499.pdf [firstpage_image] =>[orig_patent_app_number] => 635396 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2788209 [patent_doc_number] => 05133061 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-21 [patent_title] => 'Mechanism for improving the randomization of cache accesses utilizing abit-matrix multiplication permutation of cache addresses' [patent_app_type] => 1 [patent_app_number] => 7/596625 [patent_app_country] => US [patent_app_date] => 1990-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 8865 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/133/05133061.pdf [firstpage_image] =>[orig_patent_app_number] => 596625 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3059146 [patent_doc_number] => 05335352 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-02 [patent_title] => 'Reconfigurable, multi-function data storage system controller selectively operable as an input channel adapter and a data storage unit adapter' [patent_app_type] => 1 [patent_app_number] => 7/587253 [patent_app_country] => US [patent_app_date] => 1990-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1495 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/335/05335352.pdf [firstpage_image] =>[orig_patent_app_number] => 587253 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2823576 [patent_doc_number] => 05079739 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-07 [patent_title] => 'Apparatus and method for converting bit-mapped data from row orientation to column or orientation' [patent_app_type] => 1 [patent_app_number] => 7/574509 [patent_app_country] => US [patent_app_date] => 1990-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 1509 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/079/05079739.pdf [firstpage_image] =>[orig_patent_app_number] => 574509 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2947736 [patent_doc_number] => 05247620 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-09-21 [patent_title] => 'Bridge apparatus with an address check circuit for interconnecting networks' [patent_app_type] => 1 [patent_app_number] => 7/554872 [patent_app_country] => US [patent_app_date] => 1990-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 8409 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 461 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/247/05247620.pdf [firstpage_image] =>[orig_patent_app_number] => 554872 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2914388 [patent_doc_number] => 05218712 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-08 [patent_title] => 'Providing a data processor with a user-mode accessible mode of operations in which the processor performs processing operations without interruption' [patent_app_type] => 1 [patent_app_number] => 7/551040 [patent_app_country] => US [patent_app_date] => 1990-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4294 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/218/05218712.pdf [firstpage_image] =>[orig_patent_app_number] => 551040 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2799907 [patent_doc_number] => 05131086 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-14 [patent_title] => 'Method and system for executing pipelined three operand construct' [patent_app_type] => 1 [patent_app_number] => 7/539381 [patent_app_country] => US [patent_app_date] => 1990-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4534 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/131/05131086.pdf [firstpage_image] =>[orig_patent_app_number] => 539381 [rel_patent_id] =>[rel_patent_doc_number] =>)