Search

Daniel H. Pan

Examiner (ID: 721, Phone: (571)272-4172 , Office: P/2182 )

Most Active Art Unit
2182
Art Unit(s)
2182, 2183, 2302, 2783, 2315, 2899
Total Applications
1471
Issued Applications
1281
Pending Applications
50
Abandoned Applications
145

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2914371 [patent_doc_number] => 05218711 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-08 [patent_title] => 'Microprocessor having program counter registers for its coprocessors' [patent_app_type] => 1 [patent_app_number] => 7/524243 [patent_app_country] => US [patent_app_date] => 1990-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 43 [patent_no_of_words] => 16498 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/218/05218711.pdf [firstpage_image] =>[orig_patent_app_number] => 524243 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/524243
Microprocessor having program counter registers for its coprocessors May 14, 1990 Issued
07/522883 DATA COMMUNICATION CONTROL DEVICE May 13, 1990 Abandoned
Array ( [id] => 2815886 [patent_doc_number] => 05115511 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-19 [patent_title] => 'Arrangement for loading the parameters into active modules in a computer system' [patent_app_type] => 1 [patent_app_number] => 7/522474 [patent_app_country] => US [patent_app_date] => 1990-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3002 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 374 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/115/05115511.pdf [firstpage_image] =>[orig_patent_app_number] => 522474 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/522474
Arrangement for loading the parameters into active modules in a computer system May 10, 1990 Issued
07/521543 SYSTEM FOR INTEGRATING PROCESSING BY APPLICATION PROGRAMS IN HONOGENEOUS AND HETEOGENEOUS NETWORK ENVIRONMENTS May 9, 1990 Abandoned
07/514141 MICROPROCESSOR STATUS REGISTER HAVING PLURAL CONTROL INFORMATION REGISTERS EACH SET AND CLEARED BY ON AND OFF DECODERS RECEIVING THE SAME CONTROL DATA WORD Apr 24, 1990 Abandoned
Array ( [id] => 2948398 [patent_doc_number] => 05247651 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-09-21 [patent_title] => 'Interactive computer program specification and simulation system' [patent_app_type] => 1 [patent_app_number] => 7/510373 [patent_app_country] => US [patent_app_date] => 1990-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 32 [patent_no_of_words] => 27702 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/247/05247651.pdf [firstpage_image] =>[orig_patent_app_number] => 510373 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/510373
Interactive computer program specification and simulation system Apr 16, 1990 Issued
Array ( [id] => 2795396 [patent_doc_number] => 05165024 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-17 [patent_title] => 'Information transfer and receiving system with a ring interconnect architecture using voucher and ticket signals' [patent_app_type] => 1 [patent_app_number] => 7/508833 [patent_app_country] => US [patent_app_date] => 1990-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6494 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 439 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/165/05165024.pdf [firstpage_image] =>[orig_patent_app_number] => 508833 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/508833
Information transfer and receiving system with a ring interconnect architecture using voucher and ticket signals Apr 11, 1990 Issued
Array ( [id] => 2883050 [patent_doc_number] => 05163151 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-10 [patent_title] => 'System for processing and prioritizing alarms from devices on data communications network' [patent_app_type] => 1 [patent_app_number] => 7/500323 [patent_app_country] => US [patent_app_date] => 1990-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8853 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/163/05163151.pdf [firstpage_image] =>[orig_patent_app_number] => 500323 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/500323
System for processing and prioritizing alarms from devices on data communications network Mar 21, 1990 Issued
Array ( [id] => 2925870 [patent_doc_number] => 05237700 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-17 [patent_title] => 'Exception handling processor for handling first and second level exceptions with reduced exception latency' [patent_app_type] => 1 [patent_app_number] => 7/496762 [patent_app_country] => US [patent_app_date] => 1990-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2968 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 341 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/237/05237700.pdf [firstpage_image] =>[orig_patent_app_number] => 496762 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/496762
Exception handling processor for handling first and second level exceptions with reduced exception latency Mar 20, 1990 Issued
Array ( [id] => 2716735 [patent_doc_number] => 05062045 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-29 [patent_title] => 'System for maintaining a document and activity selective alterable document history log in a data processing system' [patent_app_type] => 1 [patent_app_number] => 7/484705 [patent_app_country] => US [patent_app_date] => 1990-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3165 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/062/05062045.pdf [firstpage_image] =>[orig_patent_app_number] => 484705 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/484705
System for maintaining a document and activity selective alterable document history log in a data processing system Feb 22, 1990 Issued
Array ( [id] => 2892045 [patent_doc_number] => 05119493 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-02 [patent_title] => 'System for recording at least one selected activity from a selected resource object within a distributed data processing system' [patent_app_type] => 1 [patent_app_number] => 7/484706 [patent_app_country] => US [patent_app_date] => 1990-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2777 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/119/05119493.pdf [firstpage_image] =>[orig_patent_app_number] => 484706 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/484706
System for recording at least one selected activity from a selected resource object within a distributed data processing system Feb 22, 1990 Issued
07/488386 DISK DRIVE SOFTWARE SYSTEM ARCHITECTURE Feb 22, 1990 Abandoned
Array ( [id] => 2812752 [patent_doc_number] => 05124910 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-23 [patent_title] => 'Microprogram control apparatus for generating a branch condition signal to be designated by a micro-branch instruction' [patent_app_type] => 1 [patent_app_number] => 7/475487 [patent_app_country] => US [patent_app_date] => 1990-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2946 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/124/05124910.pdf [firstpage_image] =>[orig_patent_app_number] => 475487 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/475487
Microprogram control apparatus for generating a branch condition signal to be designated by a micro-branch instruction Feb 6, 1990 Issued
07/467148 INTEGRATED DIGITAL SIGNAL PROCESSOR/GENERAL PURPOSE CPU WITH SHARED INTERNAL MEMORY Jan 17, 1990 Abandoned
Array ( [id] => 2891847 [patent_doc_number] => 05119482 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-02 [patent_title] => 'Flight system for converting 12 volts 32-bit INS data into 5 volts 8-bit data pattern in real time' [patent_app_type] => 1 [patent_app_number] => 7/452662 [patent_app_country] => US [patent_app_date] => 1989-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 3540 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 312 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/119/05119482.pdf [firstpage_image] =>[orig_patent_app_number] => 452662 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/452662
Flight system for converting 12 volts 32-bit INS data into 5 volts 8-bit data pattern in real time Dec 17, 1989 Issued
07/450358 MICROPROCESSOR WITH RESET EXECUTION FROM AN ARBITRARY ADDRESS Dec 12, 1989 Abandoned
07/431743 METHOD AND APPARATUS FOR RESETTING MULTIPLE PROCESSORS USING A COMMON ROM Nov 2, 1989 Abandoned
Array ( [id] => 2908594 [patent_doc_number] => 05241681 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-31 [patent_title] => 'Computer system having an internal cach microprocessor slowdown circuit providing an external address signal' [patent_app_type] => 1 [patent_app_number] => 7/431648 [patent_app_country] => US [patent_app_date] => 1989-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3143 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/241/05241681.pdf [firstpage_image] =>[orig_patent_app_number] => 431648 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/431648
Computer system having an internal cach microprocessor slowdown circuit providing an external address signal Nov 2, 1989 Issued
Array ( [id] => 2817091 [patent_doc_number] => 05146580 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-08 [patent_title] => 'Method and system for using expanded memory for operating system buffers and application buffers' [patent_app_type] => 1 [patent_app_number] => 7/427343 [patent_app_country] => US [patent_app_date] => 1989-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3410 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/146/05146580.pdf [firstpage_image] =>[orig_patent_app_number] => 427343 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/427343
Method and system for using expanded memory for operating system buffers and application buffers Oct 24, 1989 Issued
Array ( [id] => 2843556 [patent_doc_number] => 05175863 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-29 [patent_title] => 'Signal data processing system having independently, simultaneously operable ALU and MACU' [patent_app_type] => 1 [patent_app_number] => 7/425150 [patent_app_country] => US [patent_app_date] => 1989-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3603 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/175/05175863.pdf [firstpage_image] =>[orig_patent_app_number] => 425150 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/425150
Signal data processing system having independently, simultaneously operable ALU and MACU Oct 22, 1989 Issued
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