Search

Daniel H. Pan

Examiner (ID: 721, Phone: (571)272-4172 , Office: P/2182 )

Most Active Art Unit
2182
Art Unit(s)
2182, 2183, 2302, 2783, 2315, 2899
Total Applications
1471
Issued Applications
1281
Pending Applications
50
Abandoned Applications
145

Applications

Application numberTitle of the applicationFiling DateStatus
07/424075 PARTIAL CROSSBAR INTERCONNECT SYSTEM FOR AN ARRAY OF LOGIC CHIPS Oct 17, 1989 Abandoned
07/410109 METHOD FOR FLEXIBLY DEVELOPING A DATA PROCESSING SYSTEM Sep 19, 1989 Abandoned
07/408644 A COMMUNICATION CONTROL DEVICE AND METHOD FOR AUTOMATICALLY DETERMINING A SELF-ADDRESS Sep 17, 1989 Abandoned
Array ( [id] => 2826544 [patent_doc_number] => 05123108 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-16 [patent_title] => 'Improved CPU pipeline having register file bypass and working register bypass on update/access address compare' [patent_app_type] => 1 [patent_app_number] => 7/405794 [patent_app_country] => US [patent_app_date] => 1989-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2718 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 351 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/123/05123108.pdf [firstpage_image] =>[orig_patent_app_number] => 405794 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/405794
Improved CPU pipeline having register file bypass and working register bypass on update/access address compare Sep 10, 1989 Issued
Array ( [id] => 2788302 [patent_doc_number] => 05133066 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-21 [patent_title] => 'Method for selecting multiple versions of data in a reduced record units text editing system' [patent_app_type] => 1 [patent_app_number] => 7/405097 [patent_app_country] => US [patent_app_date] => 1989-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3226 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/133/05133066.pdf [firstpage_image] =>[orig_patent_app_number] => 405097 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/405097
Method for selecting multiple versions of data in a reduced record units text editing system Sep 7, 1989 Issued
07/403778 INFORMATION PROCESSING SYSTEM Sep 7, 1989 Abandoned
Array ( [id] => 2799962 [patent_doc_number] => 05131090 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-14 [patent_title] => 'Word processor with simplified character train designation for modifying fonts' [patent_app_type] => 1 [patent_app_number] => 7/392261 [patent_app_country] => US [patent_app_date] => 1989-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 6124 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/131/05131090.pdf [firstpage_image] =>[orig_patent_app_number] => 392261 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/392261
Word processor with simplified character train designation for modifying fonts Aug 9, 1989 Issued
Array ( [id] => 2856559 [patent_doc_number] => 05138708 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-11 [patent_title] => 'Digital processor using current state comparison for providing fault tolerance' [patent_app_type] => 1 [patent_app_number] => 7/389196 [patent_app_country] => US [patent_app_date] => 1989-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3574 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 412 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/138/05138708.pdf [firstpage_image] =>[orig_patent_app_number] => 389196 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/389196
Digital processor using current state comparison for providing fault tolerance Aug 2, 1989 Issued
Array ( [id] => 3050731 [patent_doc_number] => 05301336 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-05 [patent_title] => 'Graphical method for programming a virtual instrument' [patent_app_type] => 1 [patent_app_number] => 7/380329 [patent_app_country] => US [patent_app_date] => 1989-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 64 [patent_figures_cnt] => 125 [patent_no_of_words] => 26787 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/301/05301336.pdf [firstpage_image] =>[orig_patent_app_number] => 380329 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/380329
Graphical method for programming a virtual instrument Jul 11, 1989 Issued
07/378436 CONTROLLING REQUESTS FOR ACESS TO RESOURCES MADE BY MULTIPLE PROCESSORS OVER A SHARED BUS. Jul 9, 1989 Abandoned
Array ( [id] => 2934131 [patent_doc_number] => 05235683 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-10 [patent_title] => 'Method and apparatus for accessing peripheral storages with asychronized individual requests to a host processor' [patent_app_type] => 1 [patent_app_number] => 7/376632 [patent_app_country] => US [patent_app_date] => 1989-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6839 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/235/05235683.pdf [firstpage_image] =>[orig_patent_app_number] => 376632 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/376632
Method and apparatus for accessing peripheral storages with asychronized individual requests to a host processor Jul 6, 1989 Issued
Array ( [id] => 3561794 [patent_doc_number] => 05546592 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-13 [patent_title] => 'System and method for incrementing memory addresses in a computer system' [patent_app_type] => 1 [patent_app_number] => 7/371872 [patent_app_country] => US [patent_app_date] => 1989-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2626 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/546/05546592.pdf [firstpage_image] =>[orig_patent_app_number] => 371872 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/371872
System and method for incrementing memory addresses in a computer system Jun 25, 1989 Issued
07/369858 PROGRAM-CONTROLLED ELECTRONIC EQUIPMENT Jun 21, 1989 Abandoned
Array ( [id] => 2911086 [patent_doc_number] => 05245703 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-09-14 [patent_title] => 'Data processing system with multiple communication buses and protocols' [patent_app_type] => 1 [patent_app_number] => 7/369333 [patent_app_country] => US [patent_app_date] => 1989-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 9380 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/245/05245703.pdf [firstpage_image] =>[orig_patent_app_number] => 369333 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/369333
Data processing system with multiple communication buses and protocols Jun 20, 1989 Issued
Array ( [id] => 2826524 [patent_doc_number] => 05123107 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-16 [patent_title] => 'Topography of CMOS microcomputer integrated circuit chip including core processor and memory, priority, and I/O interface circuitry coupled thereto' [patent_app_type] => 1 [patent_app_number] => 7/368826 [patent_app_country] => US [patent_app_date] => 1989-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 10626 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 389 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/123/05123107.pdf [firstpage_image] =>[orig_patent_app_number] => 368826 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/368826
Topography of CMOS microcomputer integrated circuit chip including core processor and memory, priority, and I/O interface circuitry coupled thereto Jun 19, 1989 Issued
Array ( [id] => 2927760 [patent_doc_number] => 05179683 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-12 [patent_title] => 'Retrieval apparatus including a plurality of retrieval units' [patent_app_type] => 1 [patent_app_number] => 7/365490 [patent_app_country] => US [patent_app_date] => 1989-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3713 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/179/05179683.pdf [firstpage_image] =>[orig_patent_app_number] => 365490 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/365490
Retrieval apparatus including a plurality of retrieval units Jun 12, 1989 Issued
Array ( [id] => 2843754 [patent_doc_number] => 05129067 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-07 [patent_title] => 'Multiple instruction decoder for minimizing register port requirements' [patent_app_type] => 1 [patent_app_number] => 7/361914 [patent_app_country] => US [patent_app_date] => 1989-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 2707 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/129/05129067.pdf [firstpage_image] =>[orig_patent_app_number] => 361914 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/361914
Multiple instruction decoder for minimizing register port requirements Jun 5, 1989 Issued
Array ( [id] => 2850149 [patent_doc_number] => 05121497 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-09 [patent_title] => 'Automatic generation of executable computer code which commands another program to perform a task and operator modification of the generated executable computer code' [patent_app_type] => 1 [patent_app_number] => 7/363323 [patent_app_country] => US [patent_app_date] => 1989-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 41 [patent_no_of_words] => 12578 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/121/05121497.pdf [firstpage_image] =>[orig_patent_app_number] => 363323 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/363323
Automatic generation of executable computer code which commands another program to perform a task and operator modification of the generated executable computer code Jun 4, 1989 Issued
Array ( [id] => 2849693 [patent_doc_number] => 05121472 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-09 [patent_title] => 'Method for replacing keyboard data using single step process mode' [patent_app_type] => 1 [patent_app_number] => 7/359622 [patent_app_country] => US [patent_app_date] => 1989-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3078 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/121/05121472.pdf [firstpage_image] =>[orig_patent_app_number] => 359622 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/359622
Method for replacing keyboard data using single step process mode May 30, 1989 Issued
Array ( [id] => 2988512 [patent_doc_number] => 05226135 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-07-06 [patent_title] => 'Method for sorting vector data on the basis of partial vectors and vector processor' [patent_app_type] => 1 [patent_app_number] => 7/363894 [patent_app_country] => US [patent_app_date] => 1989-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 16354 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/226/05226135.pdf [firstpage_image] =>[orig_patent_app_number] => 363894 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/363894
Method for sorting vector data on the basis of partial vectors and vector processor May 24, 1989 Issued
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