
Daniel J. Rohrhoff
Examiner (ID: 7103, Phone: (571)270-7624 , Office: P/3637 )
| Most Active Art Unit | 3637 |
| Art Unit(s) | 3637 |
| Total Applications | 1573 |
| Issued Applications | 1199 |
| Pending Applications | 98 |
| Abandoned Applications | 307 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5229858
[patent_doc_number] => 20070291965
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-20
[patent_title] => 'Loudspeaker system and loudspeaker enclosure'
[patent_app_type] => utility
[patent_app_number] => 11/812056
[patent_app_country] => US
[patent_app_date] => 2007-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 6971
[patent_no_of_claims] => 4
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[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0291/20070291965.pdf
[firstpage_image] =>[orig_patent_app_number] => 11812056
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/812056 | Loudspeaker system and loudspeaker enclosure | Jun 13, 2007 | Issued |
Array
(
[id] => 4946991
[patent_doc_number] => 20080303117
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-11
[patent_title] => 'Integrated circuit with multi-stage matching circuit'
[patent_app_type] => utility
[patent_app_number] => 11/761087
[patent_app_country] => US
[patent_app_date] => 2007-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4374
[patent_no_of_claims] => 32
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0303/20080303117.pdf
[firstpage_image] =>[orig_patent_app_number] => 11761087
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/761087 | Integrated circuit with multi-stage matching circuit | Jun 10, 2007 | Issued |
Array
(
[id] => 5245145
[patent_doc_number] => 20070241379
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-18
[patent_title] => 'Compositions for thin-film capacitance device, high-dielectric constant insulating film, thin-film capacitance device and thin-film multilayer capacitor'
[patent_app_type] => utility
[patent_app_number] => 11/808407
[patent_app_country] => US
[patent_app_date] => 2007-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 9197
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 6
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0241/20070241379.pdf
[firstpage_image] =>[orig_patent_app_number] => 11808407
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/808407 | Compositions for thin-film capacitance device, high-dielectric constant insulating film, thin-film capacitance device and thin-film multilayer capacitor | Jun 7, 2007 | Abandoned |
Array
(
[id] => 185998
[patent_doc_number] => 07646058
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-01-12
[patent_title] => 'Device configuration and method to manufacture trench MOSFET with solderable front metal'
[patent_app_type] => utility
[patent_app_number] => 11/810327
[patent_app_country] => US
[patent_app_date] => 2007-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 4082
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/646/07646058.pdf
[firstpage_image] =>[orig_patent_app_number] => 11810327
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/810327 | Device configuration and method to manufacture trench MOSFET with solderable front metal | Jun 4, 2007 | Issued |
Array
(
[id] => 4810704
[patent_doc_number] => 20080191335
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-14
[patent_title] => 'CMOS IMAGE SENSOR CHIP SCALE PACKAGE WITH DIE RECEIVING OPENING AND METHOD OF THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/755293
[patent_app_country] => US
[patent_app_date] => 2007-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4373
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0191/20080191335.pdf
[firstpage_image] =>[orig_patent_app_number] => 11755293
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/755293 | CMOS IMAGE SENSOR CHIP SCALE PACKAGE WITH DIE RECEIVING OPENING AND METHOD OF THE SAME | May 29, 2007 | Abandoned |
Array
(
[id] => 4789448
[patent_doc_number] => 20080290421
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-11-27
[patent_title] => 'Contact barrier structure and manufacturing methods'
[patent_app_type] => utility
[patent_app_number] => 11/807127
[patent_app_country] => US
[patent_app_date] => 2007-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3412
[patent_no_of_claims] => 39
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0290/20080290421.pdf
[firstpage_image] =>[orig_patent_app_number] => 11807127
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/807127 | Contact barrier structure and manufacturing methods | May 24, 2007 | Issued |
Array
(
[id] => 5060366
[patent_doc_number] => 20070222003
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-27
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/802684
[patent_app_country] => US
[patent_app_date] => 2007-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7137
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0222/20070222003.pdf
[firstpage_image] =>[orig_patent_app_number] => 11802684
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/802684 | Semiconductor device and method of manufacturing the same | May 23, 2007 | Abandoned |
Array
(
[id] => 4829240
[patent_doc_number] => 20080128776
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-06-05
[patent_title] => 'NON-VOLATILE ROM AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/748107
[patent_app_country] => US
[patent_app_date] => 2007-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2073
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0128/20080128776.pdf
[firstpage_image] =>[orig_patent_app_number] => 11748107
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/748107 | NON-VOLATILE ROM AND METHOD OF FABRICATING THE SAME | May 13, 2007 | Abandoned |
Array
(
[id] => 142631
[patent_doc_number] => 07687856
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-30
[patent_title] => 'Body bias to facilitate transistor matching'
[patent_app_type] => utility
[patent_app_number] => 11/746887
[patent_app_country] => US
[patent_app_date] => 2007-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 25
[patent_no_of_words] => 5633
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/687/07687856.pdf
[firstpage_image] =>[orig_patent_app_number] => 11746887
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/746887 | Body bias to facilitate transistor matching | May 9, 2007 | Issued |
Array
(
[id] => 5008092
[patent_doc_number] => 20070278569
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-06
[patent_title] => 'Lateral DMOS structure'
[patent_app_type] => utility
[patent_app_number] => 11/785867
[patent_app_country] => US
[patent_app_date] => 2007-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2256
[patent_no_of_claims] => 10
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[pdf_file] => publications/A1/0278/20070278569.pdf
[firstpage_image] =>[orig_patent_app_number] => 11785867
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/785867 | Lateral DMOS structure | Apr 19, 2007 | Issued |
Array
(
[id] => 4884363
[patent_doc_number] => 20080258695
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-23
[patent_title] => 'Switching device integrated with light emitting device'
[patent_app_type] => utility
[patent_app_number] => 11/788347
[patent_app_country] => US
[patent_app_date] => 2007-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
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[patent_no_of_words] => 18398
[patent_no_of_claims] => 43
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0258/20080258695.pdf
[firstpage_image] =>[orig_patent_app_number] => 11788347
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/788347 | Switching device integrated with light emitting device | Apr 18, 2007 | Issued |
Array
(
[id] => 4649944
[patent_doc_number] => 20080037200
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-14
[patent_title] => 'Multi-Level Thin Film Capacitor on a Ceramic Substrate and Method of Manufacturing the Same'
[patent_app_type] => utility
[patent_app_number] => 11/734798
[patent_app_country] => US
[patent_app_date] => 2007-04-13
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0037/20080037200.pdf
[firstpage_image] =>[orig_patent_app_number] => 11734798
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/734798 | Multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same | Apr 16, 2007 | Issued |
Array
(
[id] => 178300
[patent_doc_number] => 07656009
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-02
[patent_title] => 'Robust ESD cell'
[patent_app_type] => utility
[patent_app_number] => 11/697814
[patent_app_country] => US
[patent_app_date] => 2007-04-09
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/656/07656009.pdf
[firstpage_image] =>[orig_patent_app_number] => 11697814
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/697814 | Robust ESD cell | Apr 8, 2007 | Issued |
Array
(
[id] => 4679869
[patent_doc_number] => 20080246095
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-09
[patent_title] => 'AMBIPOLAR TRANSISTOR DESIGN'
[patent_app_type] => utility
[patent_app_number] => 11/697604
[patent_app_country] => US
[patent_app_date] => 2007-04-06
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0246/20080246095.pdf
[firstpage_image] =>[orig_patent_app_number] => 11697604
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/697604 | Ambipolar transistor design | Apr 5, 2007 | Issued |
Array
(
[id] => 285842
[patent_doc_number] => 07550771
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[patent_title] => 'Thin film transistor, manufacturing method thereof, and active matrix display apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/697073
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[pdf_file] => patents/07/550/07550771.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/697073 | Thin film transistor, manufacturing method thereof, and active matrix display apparatus | Apr 4, 2007 | Issued |
Array
(
[id] => 4680988
[patent_doc_number] => 20080247214
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-09
[patent_title] => 'INTEGRATED MEMORY'
[patent_app_type] => utility
[patent_app_number] => 11/695677
[patent_app_country] => US
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[pdf_file] => publications/A1/0247/20080247214.pdf
[firstpage_image] =>[orig_patent_app_number] => 11695677
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/695677 | INTEGRATED MEMORY | Apr 2, 2007 | Abandoned |
Array
(
[id] => 5088783
[patent_doc_number] => 20070228422
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[patent_kind] => A1
[patent_issue_date] => 2007-10-04
[patent_title] => 'MONOLITHIC INTEGRATED CIRCUIT OF A FIELD-EFFECT SEMICONDUCTOR DEVICE AND A DIODE'
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[patent_app_number] => 11/694673
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/694673 | MONOLITHIC INTEGRATED CIRCUIT OF A FIELD-EFFECT SEMICONDUCTOR DEVICE AND A DIODE | Mar 29, 2007 | Abandoned |
Array
(
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[patent_title] => 'Overlapped stressed liners for improved contacts'
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[firstpage_image] =>[orig_patent_app_number] => 11693254
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/693254 | Overlapped stressed liners for improved contacts | Mar 28, 2007 | Issued |
Array
(
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[patent_title] => 'High voltage semiconductor devices and methods for fabricating the same'
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[pdf_file] => patents/07/602/07602037.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/692213 | High voltage semiconductor devices and methods for fabricating the same | Mar 27, 2007 | Issued |
Array
(
[id] => 322931
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[patent_title] => 'Current-triggered low turn-on voltage SCR'
[patent_app_type] => utility
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/518/07518164.pdf
[firstpage_image] =>[orig_patent_app_number] => 11691514
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/691514 | Current-triggered low turn-on voltage SCR | Mar 26, 2007 | Issued |