Search

Daniel J. Wiley

Examiner (ID: 7827, Phone: (571)270-7324 , Office: P/3679 )

Most Active Art Unit
3678
Art Unit(s)
3678, 3679
Total Applications
1207
Issued Applications
906
Pending Applications
65
Abandoned Applications
257

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19795165 [patent_doc_number] => 12236115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Flash memory controller [patent_app_type] => utility [patent_app_number] => 18/412635 [patent_app_country] => US [patent_app_date] => 2024-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4871 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18412635 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/412635
Flash memory controller Jan 14, 2024 Issued
Array ( [id] => 20404277 [patent_doc_number] => 12494257 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-09 [patent_title] => Memory device including string select transistors having different threshold voltages and method of operating the memory device [patent_app_type] => utility [patent_app_number] => 18/409344 [patent_app_country] => US [patent_app_date] => 2024-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 13476 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18409344 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/409344
Memory device including string select transistors having different threshold voltages and method of operating the memory device Jan 9, 2024 Issued
Array ( [id] => 20359927 [patent_doc_number] => 12475931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => Capacitive sensing with a micro pump in a memory device [patent_app_type] => utility [patent_app_number] => 18/405096 [patent_app_country] => US [patent_app_date] => 2024-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 6769 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18405096 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/405096
Capacitive sensing with a micro pump in a memory device Jan 4, 2024 Issued
Array ( [id] => 19886687 [patent_doc_number] => 12272412 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-08 [patent_title] => Performing selective copyback in memory devices [patent_app_type] => utility [patent_app_number] => 18/394660 [patent_app_country] => US [patent_app_date] => 2023-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10549 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18394660 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/394660
Performing selective copyback in memory devices Dec 21, 2023 Issued
Array ( [id] => 20071891 [patent_doc_number] => 20250210113 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => OPEN BLOCK DETECTION USING CURRENT CONSUMPTION PEAK DURING FOURTH TIME PERIOD OF READ OPERATION AND METHOD OF LOWERING CURRENT CONSUMPTION FOR NON-VOLATILE MEMORY APPARATUS [patent_app_type] => utility [patent_app_number] => 18/392585 [patent_app_country] => US [patent_app_date] => 2023-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10116 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18392585 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/392585
Open block detection using current consumption peak during fourth time period of read operation and method of lowering current consumption for non-volatile memory apparatus Dec 20, 2023 Issued
Array ( [id] => 19085945 [patent_doc_number] => 20240112746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/538722 [patent_app_country] => US [patent_app_date] => 2023-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13032 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18538722 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/538722
Semiconductor storage device Dec 12, 2023 Issued
Array ( [id] => 20053411 [patent_doc_number] => 20250191633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => ROW-HAMMER CONDITION MITIGATION USING A PHYSICALLY ADJACENT ROW MAPPING TABLE [patent_app_type] => utility [patent_app_number] => 18/534030 [patent_app_country] => US [patent_app_date] => 2023-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4870 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18534030 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/534030
Row-hammer condition mitigation using a physically adjacent row mapping table Dec 7, 2023 Issued
Array ( [id] => 20375085 [patent_doc_number] => 12482527 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-25 [patent_title] => Apparatus and methods for read retry with conditional data refresh [patent_app_type] => utility [patent_app_number] => 18/533110 [patent_app_country] => US [patent_app_date] => 2023-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5765 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18533110 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/533110
Apparatus and methods for read retry with conditional data refresh Dec 6, 2023 Issued
Array ( [id] => 20495183 [patent_doc_number] => 12537059 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-27 [patent_title] => Method of operating a memory controller, memory controller, and memory system [patent_app_type] => utility [patent_app_number] => 18/531563 [patent_app_country] => US [patent_app_date] => 2023-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 4793 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18531563 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/531563
Method of operating a memory controller, memory controller, and memory system Dec 5, 2023 Issued
Array ( [id] => 19085228 [patent_doc_number] => 20240112029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => ACCELERATION OF MODEL/WEIGHT PROGRAMMING IN MEMRISTOR CROSSBAR ARRAYS [patent_app_type] => utility [patent_app_number] => 18/528935 [patent_app_country] => US [patent_app_date] => 2023-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6921 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18528935 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/528935
Acceleration of model/weight programming in memristor crossbar arrays Dec 4, 2023 Issued
Array ( [id] => 20441324 [patent_doc_number] => 12512164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Memory system and operation method thereof, and readable storage medium [patent_app_type] => utility [patent_app_number] => 18/527984 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 11738 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18527984 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/527984
Memory system and operation method thereof, and readable storage medium Dec 3, 2023 Issued
Array ( [id] => 19780417 [patent_doc_number] => 12229450 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 18/524477 [patent_app_country] => US [patent_app_date] => 2023-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 39 [patent_no_of_words] => 15955 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18524477 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/524477
Semiconductor memory device Nov 29, 2023 Issued
Array ( [id] => 20004579 [patent_doc_number] => 20250142801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => Layout pattern for static random access memory [patent_app_type] => utility [patent_app_number] => 18/518476 [patent_app_country] => US [patent_app_date] => 2023-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518476 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/518476
Layout pattern for static random access memory Nov 22, 2023 Issued
Array ( [id] => 20028490 [patent_doc_number] => 20250166712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => IN-NAND READ THRESHOLD VOLTAGE SEARCH SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 18/514174 [patent_app_country] => US [patent_app_date] => 2023-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3616 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18514174 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/514174
In-nand read threshold voltage search system and method Nov 19, 2023 Issued
Array ( [id] => 19037819 [patent_doc_number] => 20240087634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => DATA STORAGE DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/510656 [patent_app_country] => US [patent_app_date] => 2023-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10582 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18510656 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/510656
DATA STORAGE DEVICE AND OPERATING METHOD THEREOF Nov 15, 2023 Pending
Array ( [id] => 20019325 [patent_doc_number] => 20250157547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => DELAYED SELECT GATE RAMP-UP FOR PEAK READ CURRENT CONSUMPTION REDUCTION FOR NON-VOLATILE MEMORY APPARATUS [patent_app_type] => utility [patent_app_number] => 18/509848 [patent_app_country] => US [patent_app_date] => 2023-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10184 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18509848 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/509848
Delayed select gate ramp-up for peak read current consumption reduction for non-volatile memory apparatus Nov 14, 2023 Issued
Array ( [id] => 20019329 [patent_doc_number] => 20250157551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => REDUCING READ DISTURB IN A SEMI-CIRCULAR MEMORY CELL OF A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/389284 [patent_app_country] => US [patent_app_date] => 2023-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8632 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18389284 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/389284
Reducing read disturb in a semi-circular memory cell of a memory device Nov 13, 2023 Issued
Array ( [id] => 19036117 [patent_doc_number] => 20240085932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => DETERMINING THE EFFECTS OF DIFFERENT ELECTRICAL CHARACTERISTICS OF A DRIVE-SENSE CIRCUIT ON A LOAD [patent_app_type] => utility [patent_app_number] => 18/508311 [patent_app_country] => US [patent_app_date] => 2023-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 34848 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18508311 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/508311
Determining the effects of different electrical characteristics of a drive-sense circuit on a load Nov 13, 2023 Issued
Array ( [id] => 19546136 [patent_doc_number] => 20240363172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => NONVOLATILE MEMORY DEVICES, STORAGE DEVICES INCLUDING THE SAME, AND METHODS OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/509021 [patent_app_country] => US [patent_app_date] => 2023-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16437 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18509021 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/509021
NONVOLATILE MEMORY DEVICES, STORAGE DEVICES INCLUDING THE SAME, AND METHODS OF OPERATING THE SAME Nov 13, 2023 Pending
Array ( [id] => 19828588 [patent_doc_number] => 12249379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-11 [patent_title] => Open block-based read offset compensation in read operation of memory device [patent_app_type] => utility [patent_app_number] => 18/387780 [patent_app_country] => US [patent_app_date] => 2023-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 10889 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18387780 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/387780
Open block-based read offset compensation in read operation of memory device Nov 6, 2023 Issued
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