Search

Daniel M. Luke

Examiner (ID: 2133, Phone: (571)270-1569 , Office: P/2813 )

Most Active Art Unit
2813
Art Unit(s)
2813, 2896
Total Applications
848
Issued Applications
566
Pending Applications
72
Abandoned Applications
226

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17070627 [patent_doc_number] => 20210272844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/807138 [patent_app_country] => US [patent_app_date] => 2020-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3216 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16807138 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/807138
Liner for through-silicon via Mar 1, 2020 Issued
Array ( [id] => 19952904 [patent_doc_number] => 12324292 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => Apparatus and method for self-assembly of semiconductor light-emitting element [patent_app_type] => utility [patent_app_number] => 17/793882 [patent_app_country] => US [patent_app_date] => 2020-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 4360 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17793882 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/793882
Apparatus and method for self-assembly of semiconductor light-emitting element Feb 12, 2020 Issued
Array ( [id] => 17668285 [patent_doc_number] => 11361989 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-14 [patent_title] => Method for manufacturing interconnect structures including air gaps [patent_app_type] => utility [patent_app_number] => 16/788057 [patent_app_country] => US [patent_app_date] => 2020-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 6872 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16788057 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/788057
Method for manufacturing interconnect structures including air gaps Feb 10, 2020 Issued
Array ( [id] => 17025432 [patent_doc_number] => 20210249304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => Conductive Interconnects and Methods of Forming Conductive Interconnects [patent_app_type] => utility [patent_app_number] => 16/787321 [patent_app_country] => US [patent_app_date] => 2020-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5465 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16787321 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/787321
Conductive interconnects and methods of forming conductive interconnects Feb 10, 2020 Issued
Array ( [id] => 15831495 [patent_doc_number] => 20200131029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => WATERPROOF MICROPHONE AND ASSOCIATED PACKING TECHNIQUES [patent_app_type] => utility [patent_app_number] => 16/731327 [patent_app_country] => US [patent_app_date] => 2019-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16731327 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/731327
Waterproof microphone and associated packing techniques Dec 30, 2019 Issued
Array ( [id] => 16888919 [patent_doc_number] => 20210175116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE WITH AIR GAP AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/707177 [patent_app_country] => US [patent_app_date] => 2019-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6425 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16707177 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/707177
Semiconductor device structure with air gap and method for forming the same Dec 8, 2019 Issued
Array ( [id] => 17381287 [patent_doc_number] => 11239320 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Classifier circuits with graphene transistors [patent_app_type] => utility [patent_app_number] => 16/706004 [patent_app_country] => US [patent_app_date] => 2019-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 32 [patent_no_of_words] => 5191 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16706004 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/706004
Classifier circuits with graphene transistors Dec 5, 2019 Issued
Array ( [id] => 15687949 [patent_doc_number] => 20200098638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => IR ASSISTED FAN-OUT WAFER LEVEL PACKAGING USING SILICON HANDLER [patent_app_type] => utility [patent_app_number] => 16/693526 [patent_app_country] => US [patent_app_date] => 2019-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6427 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16693526 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/693526
IR assisted fan-out wafer level packaging using silicon handler Nov 24, 2019 Issued
Array ( [id] => 17638138 [patent_doc_number] => 11348872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-31 [patent_title] => Hybrid dielectric scheme for varying liner thickness and manganese concentration [patent_app_type] => utility [patent_app_number] => 16/690925 [patent_app_country] => US [patent_app_date] => 2019-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 13 [patent_no_of_words] => 4198 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16690925 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/690925
Hybrid dielectric scheme for varying liner thickness and manganese concentration Nov 20, 2019 Issued
Array ( [id] => 16020857 [patent_doc_number] => 20200185272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => METHOD OF FORMING CAPPED METALLIZED VIAS [patent_app_type] => utility [patent_app_number] => 16/681330 [patent_app_country] => US [patent_app_date] => 2019-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13548 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16681330 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/681330
Method of forming capped metallized vias Nov 11, 2019 Issued
Array ( [id] => 19494259 [patent_doc_number] => 12112982 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-08 [patent_title] => Nanoscale resolution, spatially-controlled conductivity modulation of dielectric materials using a focused ion beam [patent_app_type] => utility [patent_app_number] => 17/293276 [patent_app_country] => US [patent_app_date] => 2019-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 4844 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17293276 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/293276
Nanoscale resolution, spatially-controlled conductivity modulation of dielectric materials using a focused ion beam Nov 6, 2019 Issued
Array ( [id] => 15874123 [patent_doc_number] => 20200144465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => LIGHT EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 16/672691 [patent_app_country] => US [patent_app_date] => 2019-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7641 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16672691 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/672691
Light emitting device including light shielding layer Nov 3, 2019 Issued
Array ( [id] => 16677508 [patent_doc_number] => 20210066274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/596725 [patent_app_country] => US [patent_app_date] => 2019-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6559 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16596725 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/596725
Semiconductor device with exposed input/output pad in recess Oct 7, 2019 Issued
Array ( [id] => 17623115 [patent_doc_number] => 11342177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-24 [patent_title] => Treatment to control deposition rate [patent_app_type] => utility [patent_app_number] => 16/569953 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 27 [patent_no_of_words] => 10175 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16569953 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/569953
Treatment to control deposition rate Sep 12, 2019 Issued
Array ( [id] => 15369625 [patent_doc_number] => 20200020577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => VOID-FREE METALLIC INTERCONNECT STRUCTURES WITH SELF-FORMED DIFFUSION BARRIER LAYERS [patent_app_type] => utility [patent_app_number] => 16/564518 [patent_app_country] => US [patent_app_date] => 2019-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7807 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16564518 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/564518
Void-free metallic interconnect structures with self-formed diffusion barrier layers Sep 8, 2019 Issued
Array ( [id] => 17145413 [patent_doc_number] => 20210313426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => METHOD FOR CONTROLLING CURRENT PATH BY USING ELECTRIC FIELD, AND ELECTRONIC ELEMENT [patent_app_type] => utility [patent_app_number] => 17/284106 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4629 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17284106 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/284106
Method for controlling current path by using electric field, and electronic element Sep 3, 2019 Issued
Array ( [id] => 15274643 [patent_doc_number] => 20190386056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 16/554347 [patent_app_country] => US [patent_app_date] => 2019-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9120 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16554347 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/554347
Method for bonding and connecting substrates Aug 27, 2019 Issued
Array ( [id] => 19229612 [patent_doc_number] => 12009255 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-11 [patent_title] => Method of manufacturing semiconductor device including laser treatment for contact plug [patent_app_type] => utility [patent_app_number] => 17/281966 [patent_app_country] => US [patent_app_date] => 2019-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2152 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17281966 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/281966
Method of manufacturing semiconductor device including laser treatment for contact plug Aug 25, 2019 Issued
Array ( [id] => 15415207 [patent_doc_number] => 20200027926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => CROSS-POINT MEMORY AND METHODS FOR FABRICATION OF SAME [patent_app_type] => utility [patent_app_number] => 16/542136 [patent_app_country] => US [patent_app_date] => 2019-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7967 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16542136 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/542136
Cross-point memory and methods for fabrication of same Aug 14, 2019 Issued
Array ( [id] => 15154915 [patent_doc_number] => 20190355935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => ORGANIC LIGHT EMITTING DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/529030 [patent_app_country] => US [patent_app_date] => 2019-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9085 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16529030 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/529030
Organic light emitting display device Jul 31, 2019 Issued
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