Search

Daniel Pm Wicklund

Examiner (ID: 912, Phone: (571)270-7508 , Office: P/2833 )

Most Active Art Unit
2833
Art Unit(s)
2833, 2844
Total Applications
376
Issued Applications
278
Pending Applications
0
Abandoned Applications
98

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8364124 [patent_doc_number] => 08253192 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-28 [patent_title] => 'MOS device with varying trench depth' [patent_app_type] => utility [patent_app_number] => 13/088275 [patent_app_country] => US [patent_app_date] => 2011-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 43 [patent_no_of_words] => 5807 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13088275 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/088275
MOS device with varying trench depth Apr 14, 2011 Issued
Array ( [id] => 8726017 [patent_doc_number] => 08405139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-26 [patent_title] => 'Nonvolatile semiconductor memory device having element isolating region of trench type' [patent_app_type] => utility [patent_app_number] => 13/085884 [patent_app_country] => US [patent_app_date] => 2011-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 65 [patent_no_of_words] => 13107 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13085884 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/085884
Nonvolatile semiconductor memory device having element isolating region of trench type Apr 12, 2011 Issued
Array ( [id] => 6089457 [patent_doc_number] => 20110217825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'FORMING STRUCTURES THAT INCLUDE A RELAXED OR PSEUDO-RELAXED LAYER ON A SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/080436 [patent_app_country] => US [patent_app_date] => 2011-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10081 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20110217825.pdf [firstpage_image] =>[orig_patent_app_number] => 13080436 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/080436
Forming structures that include a relaxed or pseudo-relaxed layer on a substrate Apr 4, 2011 Issued
Array ( [id] => 5955715 [patent_doc_number] => 20110180800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-28 [patent_title] => 'LIQUID CRYSTAL DISPLAY PANEL AND FABRICATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/046292 [patent_app_country] => US [patent_app_date] => 2011-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 8929 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20110180800.pdf [firstpage_image] =>[orig_patent_app_number] => 13046292 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/046292
Liquid crystal display panel and fabricating method thereof Mar 10, 2011 Issued
Array ( [id] => 6047730 [patent_doc_number] => 20110207276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'POWER MOS DEVICE FABRICATION' [patent_app_type] => utility [patent_app_number] => 13/043721 [patent_app_country] => US [patent_app_date] => 2011-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4052 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20110207276.pdf [firstpage_image] =>[orig_patent_app_number] => 13043721 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/043721
Power MOS device fabrication Mar 8, 2011 Issued
Array ( [id] => 5963217 [patent_doc_number] => 20110147821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'NON-VOLATILE TWO-TRANSISTOR PROGRAMMABLE LOGIC CELL AND ARRAY LAYOUT' [patent_app_type] => utility [patent_app_number] => 13/037507 [patent_app_country] => US [patent_app_date] => 2011-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4535 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20110147821.pdf [firstpage_image] =>[orig_patent_app_number] => 13037507 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/037507
Non-volatile two-transistor programmable logic cell and array layout Feb 28, 2011 Issued
Array ( [id] => 8270807 [patent_doc_number] => 08212310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-03 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/022611 [patent_app_country] => US [patent_app_date] => 2011-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 7197 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13022611 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/022611
Semiconductor device Feb 6, 2011 Issued
Array ( [id] => 6137338 [patent_doc_number] => 20110127578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'Manufacturing method for semiconductor device and semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/929504 [patent_app_country] => US [patent_app_date] => 2011-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10979 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20110127578.pdf [firstpage_image] =>[orig_patent_app_number] => 12929504 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/929504
Manufacturing method for semiconductor device and semiconductor device Jan 27, 2011 Issued
Array ( [id] => 5963175 [patent_doc_number] => 20110147800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'SEMICONDUCTOR DEVICE INCLUDING CONDUCTIVE LINES WITH FINE LINE WIDTH AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/014952 [patent_app_country] => US [patent_app_date] => 2011-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 14611 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20110147800.pdf [firstpage_image] =>[orig_patent_app_number] => 13014952 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/014952
Semiconductor device including conductive lines with fine line width and method of fabricating the same Jan 26, 2011 Issued
Array ( [id] => 7775503 [patent_doc_number] => 08120107 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-21 [patent_title] => 'Semiconductor device internally having insulated gate bipolar transistor' [patent_app_type] => utility [patent_app_number] => 13/005900 [patent_app_country] => US [patent_app_date] => 2011-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 9878 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/120/08120107.pdf [firstpage_image] =>[orig_patent_app_number] => 13005900 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/005900
Semiconductor device internally having insulated gate bipolar transistor Jan 12, 2011 Issued
Array ( [id] => 8480858 [patent_doc_number] => 20120280265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-08 [patent_title] => 'LIGHT EMITTING ELEMENT AND IMAGE DISPLAY DEVICE USING THE LIGHT EMITTING ELEMENT' [patent_app_type] => utility [patent_app_number] => 13/520958 [patent_app_country] => US [patent_app_date] => 2011-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7819 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13520958 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/520958
Light emitting element and image display device using the light emitting element Jan 4, 2011 Issued
Array ( [id] => 8493340 [patent_doc_number] => 20120292748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-22 [patent_title] => 'METHODS AND STRUCTURES FOR FORMING INTEGRATED SEMICONDUCTOR STRUCTURES' [patent_app_type] => utility [patent_app_number] => 13/522628 [patent_app_country] => US [patent_app_date] => 2011-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8865 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13522628 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/522628
Methods and structures for forming integrated semiconductor structures Jan 3, 2011 Issued
Array ( [id] => 7811237 [patent_doc_number] => 08133767 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-13 [patent_title] => 'Efficient interconnect structure for electrical fuse applications' [patent_app_type] => utility [patent_app_number] => 12/976445 [patent_app_country] => US [patent_app_date] => 2010-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 20 [patent_no_of_words] => 7291 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/133/08133767.pdf [firstpage_image] =>[orig_patent_app_number] => 12976445 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/976445
Efficient interconnect structure for electrical fuse applications Dec 21, 2010 Issued
Array ( [id] => 10888099 [patent_doc_number] => 08912095 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-16 [patent_title] => 'Polishing method, polishing apparatus and polishing tool' [patent_app_type] => utility [patent_app_number] => 13/511802 [patent_app_country] => US [patent_app_date] => 2010-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 47 [patent_no_of_words] => 21329 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13511802 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/511802
Polishing method, polishing apparatus and polishing tool Dec 13, 2010 Issued
Array ( [id] => 8483334 [patent_doc_number] => 20120282741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-08 [patent_title] => 'METHOD FOR MANUFACTURING THIN FILM TRANSISTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/515683 [patent_app_country] => US [patent_app_date] => 2010-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9087 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13515683 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/515683
Method for manufacturing thin film transistor device Dec 12, 2010 Issued
Array ( [id] => 8178198 [patent_doc_number] => 08178913 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-15 [patent_title] => 'Semiconductor device and method for manufacturing same' [patent_app_type] => utility [patent_app_number] => 12/926771 [patent_app_country] => US [patent_app_date] => 2010-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 33 [patent_no_of_words] => 11188 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/178/08178913.pdf [firstpage_image] =>[orig_patent_app_number] => 12926771 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/926771
Semiconductor device and method for manufacturing same Dec 7, 2010 Issued
Array ( [id] => 8656987 [patent_doc_number] => 20130037816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-14 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/520271 [patent_app_country] => US [patent_app_date] => 2010-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9251 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13520271 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/520271
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Dec 1, 2010 Abandoned
Array ( [id] => 10138590 [patent_doc_number] => 09171912 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-27 [patent_title] => 'Group IV element doped P-type Zn(Mg,Cd,Be)O(S,Se) semiconductor' [patent_app_type] => utility [patent_app_number] => 12/944227 [patent_app_country] => US [patent_app_date] => 2010-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5783 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12944227 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/944227
Group IV element doped P-type Zn(Mg,Cd,Be)O(S,Se) semiconductor Nov 10, 2010 Issued
Array ( [id] => 6052374 [patent_doc_number] => 20110108969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-12 [patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADS AND METHOD OF MANUFACTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 12/944351 [patent_app_country] => US [patent_app_date] => 2010-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4752 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20110108969.pdf [firstpage_image] =>[orig_patent_app_number] => 12944351 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/944351
Integrated circuit packaging system with leads and method of manufacture thereof Nov 10, 2010 Issued
Array ( [id] => 5963202 [patent_doc_number] => 20110147813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/944224 [patent_app_country] => US [patent_app_date] => 2010-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 20468 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20110147813.pdf [firstpage_image] =>[orig_patent_app_number] => 12944224 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/944224
Semiconductor device and method for fabricating the same Nov 10, 2010 Issued
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