Daniel Sean Larkin

Array ( [id] => 16706420 [patent_doc_number] => 10956353 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-03-23 [patent_title] => Connector configurations for printed circuit boards [patent_app_type] => utility [patent_app_number] => 15/905334 [patent_app_country] => US [patent_app_date] => 2018-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 8004 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15905334 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14457819 [patent_doc_number] => 10324871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-18 [patent_title] => Method and system for buffer state based low power operation in a MoCA network [patent_app_type] => utility [patent_app_number] => 15/878099 [patent_app_country] => US [patent_app_date] => 2018-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4796 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15878099 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14952995 [patent_doc_number] => 10437762 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-08 [patent_title] => Partitioned interconnect slot for inter-processor operation [patent_app_type] => utility [patent_app_number] => 15/872100 [patent_app_country] => US [patent_app_date] => 2018-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5431 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15872100 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14585635 [patent_doc_number] => 20190220426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-18 [patent_title] => NEAR-MEMORY HARDENED COMPUTE BLOCKS FOR CONFIGURABLE COMPUTING SUBSTRATES [patent_app_type] => utility [patent_app_number] => 15/872943 [patent_app_country] => US [patent_app_date] => 2018-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4547 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15872943 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13782821 [patent_doc_number] => 20190004949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-03 [patent_title] => MEMORY SYSTEM, MEMORY CONTROLLER FOR MEMORY SYSTEM, OPERATION METHOD OF MEMORY CONTROLLER, AND OPERATION METHOD OF USER DEVICE INCLUDING MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/871283 [patent_app_country] => US [patent_app_date] => 2018-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13353 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15871283 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13511855 [patent_doc_number] => 20180307470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-25 [patent_title] => METHODS AND APPARATUS FOR DATA TRANSFER OPTIMIZATION [patent_app_type] => utility [patent_app_number] => 15/837551 [patent_app_country] => US [patent_app_date] => 2017-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15859 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15837551 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18053074 [patent_doc_number] => 11526459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => Adapter, terminal device and adapter system [patent_app_type] => utility [patent_app_number] => 16/498779 [patent_app_country] => US [patent_app_date] => 2017-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 10824 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 341 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16498779 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13595517 [patent_doc_number] => 20180349307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-06 [patent_title] => TECHNIQUES FOR ISSUING INTERRUPTS IN A DATA PROCESSING SYSTEM WITH MULTIPLE SCOPES [patent_app_type] => utility [patent_app_number] => 15/826212 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14882 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15826212 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18873005 [patent_doc_number] => 11860812 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Serdes link training [patent_app_type] => utility [patent_app_number] => 15/811951 [patent_app_country] => US [patent_app_date] => 2017-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 16619 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15811951 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12262643 [patent_doc_number] => 20180081839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'SUSPEND AND RESUME IN A TIME SHARED COPROCESSOR' [patent_app_type] => utility [patent_app_number] => 15/809170 [patent_app_country] => US [patent_app_date] => 2017-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 14178 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15809170 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12207558 [patent_doc_number] => 20180052784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-22 [patent_title] => 'SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 15/796321 [patent_app_country] => US [patent_app_date] => 2017-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7803 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15796321 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12161184 [patent_doc_number] => 20180032451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'SYSTEMS AND METHODS FOR EXCHANGING USB INFORMATION WITH SELECTED REMOTE DEVICES' [patent_app_type] => utility [patent_app_number] => 15/729468 [patent_app_country] => US [patent_app_date] => 2017-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5895 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15729468 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16116689 [patent_doc_number] => 20200210367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => EXTERNAL SERIAL AT ATTACHMENT DEVICE [patent_app_type] => utility [patent_app_number] => 16/481082 [patent_app_country] => US [patent_app_date] => 2017-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3179 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16481082 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14062067 [patent_doc_number] => 10235326 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-03-19 [patent_title] => Universal asynchronous receiver/transmitter (UART) data pass-through for virtualized environments [patent_app_type] => utility [patent_app_number] => 15/695717 [patent_app_country] => US [patent_app_date] => 2017-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7847 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15695717 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16248337 [patent_doc_number] => 10747697 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Semiconductor device, method of operating semiconductor device and system incorporating same [patent_app_type] => utility [patent_app_number] => 15/695058 [patent_app_country] => US [patent_app_date] => 2017-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6516 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15695058 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14766661 [patent_doc_number] => 10394727 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-27 [patent_title] => Semiconductor memory device with data buffering [patent_app_type] => utility [patent_app_number] => 15/694973 [patent_app_country] => US [patent_app_date] => 2017-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 25 [patent_no_of_words] => 7881 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15694973 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13448751 [patent_doc_number] => 20180275918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-27 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/693350 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5364 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15693350 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17706974 [patent_doc_number] => 20220206980 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => Adapter [patent_app_type] => utility [patent_app_number] => 16/326190 [patent_app_country] => US [patent_app_date] => 2017-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5303 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16326190 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17622021 [patent_doc_number] => 11341077 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-24 [patent_title] => Method for the assignment of addresses by a master unit to a number of slave units [patent_app_type] => utility [patent_app_number] => 16/321483 [patent_app_country] => US [patent_app_date] => 2017-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1494 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 335 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16321483 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13845555 [patent_doc_number] => 20190026262 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-24 [patent_title] => SYSTEMS AND METHODS FOR RENDERING DATA BASED ON FIXED-LENGTH TEMPLATING [patent_app_type] => utility [patent_app_number] => 15/657062 [patent_app_country] => US [patent_app_date] => 2017-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11756 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15657062 [rel_patent_id] =>[rel_patent_doc_number] =>)