Search

Daniel St Cyr

Examiner (ID: 6316, Phone: (571)272-2407 , Office: P/2876 )

Most Active Art Unit
2876
Art Unit(s)
2876
Total Applications
2424
Issued Applications
1851
Pending Applications
196
Abandoned Applications
406

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9762204 [patent_doc_number] => 08846525 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-30 [patent_title] => 'Hardmask materials' [patent_app_type] => utility [patent_app_number] => 13/967832 [patent_app_country] => US [patent_app_date] => 2013-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 32 [patent_no_of_words] => 12521 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13967832 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/967832
Hardmask materials Aug 14, 2013 Issued
Array ( [id] => 9191567 [patent_doc_number] => 20130330882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'Integrated Circuit Packages, Methods of Forming Integrated Circuit Packages, And Methods of Assembling Integrated Circuit Packages' [patent_app_type] => utility [patent_app_number] => 13/963866 [patent_app_country] => US [patent_app_date] => 2013-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2808 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13963866 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/963866
Methods of forming integrated circuit packages Aug 8, 2013 Issued
Array ( [id] => 10091649 [patent_doc_number] => 09128473 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-08 [patent_title] => 'Arrangement for plasma processing system control based on RF voltage' [patent_app_type] => utility [patent_app_number] => 13/959584 [patent_app_country] => US [patent_app_date] => 2013-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4658 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13959584 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/959584
Arrangement for plasma processing system control based on RF voltage Aug 4, 2013 Issued
Array ( [id] => 9174509 [patent_doc_number] => 20130316493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-28 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/956659 [patent_app_country] => US [patent_app_date] => 2013-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 29013 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13956659 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/956659
Method for manufacturing semiconductor device Jul 31, 2013 Issued
Array ( [id] => 9294764 [patent_doc_number] => 20140038398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'SUBSTRATE TREATING METHODS AND APPARATUSES EMPLOYING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/950856 [patent_app_country] => US [patent_app_date] => 2013-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 7362 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13950856 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/950856
SUBSTRATE TREATING METHODS AND APPARATUSES EMPLOYING THE SAME Jul 24, 2013 Abandoned
Array ( [id] => 9996518 [patent_doc_number] => 09041120 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-26 [patent_title] => 'Power MOS transistor with integrated gate-resistor' [patent_app_type] => utility [patent_app_number] => 13/950813 [patent_app_country] => US [patent_app_date] => 2013-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 9733 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13950813 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/950813
Power MOS transistor with integrated gate-resistor Jul 24, 2013 Issued
Array ( [id] => 9135004 [patent_doc_number] => 20130295719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'GRADED METAL OXIDE RESISTANCE BASED SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/937465 [patent_app_country] => US [patent_app_date] => 2013-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6875 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13937465 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/937465
Graded metal oxide resistance based semiconductor memory device Jul 8, 2013 Issued
Array ( [id] => 10844355 [patent_doc_number] => 08871530 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-10-28 [patent_title] => 'Free layers with iron interfacial layer and oxide cap for high perpendicular anisotropy energy density' [patent_app_type] => utility [patent_app_number] => 13/933286 [patent_app_country] => US [patent_app_date] => 2013-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4332 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13933286 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/933286
Free layers with iron interfacial layer and oxide cap for high perpendicular anisotropy energy density Jul 1, 2013 Issued
Array ( [id] => 9971720 [patent_doc_number] => 09018735 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-28 [patent_title] => 'Silicon wafer and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 13/917117 [patent_app_country] => US [patent_app_date] => 2013-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 29 [patent_no_of_words] => 8119 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13917117 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/917117
Silicon wafer and fabrication method thereof Jun 12, 2013 Issued
Array ( [id] => 9201511 [patent_doc_number] => 20140000688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'Biologically Self-Assembled Nanotubes' [patent_app_type] => utility [patent_app_number] => 13/914253 [patent_app_country] => US [patent_app_date] => 2013-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12659 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13914253 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/914253
Biologically self-assembled nanotubes Jun 9, 2013 Issued
Array ( [id] => 10093311 [patent_doc_number] => 09130144 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-08 [patent_title] => 'Multiferro-heterostructure composition having tunable magnetic coupling at room temperature' [patent_app_type] => utility [patent_app_number] => 14/397044 [patent_app_country] => US [patent_app_date] => 2013-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2180 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14397044 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/397044
Multiferro-heterostructure composition having tunable magnetic coupling at room temperature May 29, 2013 Issued
Array ( [id] => 9050111 [patent_doc_number] => 20130247825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-26 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/896482 [patent_app_country] => US [patent_app_date] => 2013-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 7037 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13896482 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/896482
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING APPARATUS May 16, 2013 Abandoned
Array ( [id] => 9038361 [patent_doc_number] => 20130240999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'EFFECTING SELECTIVITY OF SILICON OR SILICON-GERMANIUM DEPOSITION ON A SILICON OR SILICON-GERMANIUM SUBSTRATE BY DOPING' [patent_app_type] => utility [patent_app_number] => 13/872478 [patent_app_country] => US [patent_app_date] => 2013-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6768 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13872478 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/872478
Effecting selectivity of silicon or silicon-germanium deposition on a silicon or silicon-germanium substrate by doping Apr 28, 2013 Issued
Array ( [id] => 9034419 [patent_doc_number] => 20130237057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-12 [patent_title] => 'CONTACT ELEMENTS OF A SEMICONDUCTOR DEVICE FORMED BY ELECTROLESS PLATING AND EXCESS MATERIAL REMOVAL WITH REDUCED SHEER FORCES' [patent_app_type] => utility [patent_app_number] => 13/870661 [patent_app_country] => US [patent_app_date] => 2013-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9231 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13870661 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/870661
Contact elements of a semiconductor device formed by electroless plating and excess material removal with reduced sheer forces Apr 24, 2013 Issued
Array ( [id] => 9524026 [patent_doc_number] => 08748289 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-10 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/868500 [patent_app_country] => US [patent_app_date] => 2013-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 6478 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13868500 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/868500
Method for manufacturing semiconductor device Apr 22, 2013 Issued
Array ( [id] => 10212173 [patent_doc_number] => 20150097165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-09 [patent_title] => 'OPTOELECTRONIC COMPONENT AND METHOD FOR PRODUCING AN OPTOELECTRONIC COMPONENT' [patent_app_type] => utility [patent_app_number] => 14/396780 [patent_app_country] => US [patent_app_date] => 2013-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 20186 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14396780 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/396780
Optoelectronic component having a UV-protecting substrate and method for producing the same Apr 10, 2013 Issued
Array ( [id] => 10053492 [patent_doc_number] => 09093377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-28 [patent_title] => 'Magnetic trap for cylindrical diamagnetic materials' [patent_app_type] => utility [patent_app_number] => 13/800918 [patent_app_country] => US [patent_app_date] => 2013-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 4092 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13800918 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/800918
Magnetic trap for cylindrical diamagnetic materials Mar 12, 2013 Issued
Array ( [id] => 12498447 [patent_doc_number] => 09997443 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-12 [patent_title] => Through vias and methods of formation thereof [patent_app_type] => utility [patent_app_number] => 13/776153 [patent_app_country] => US [patent_app_date] => 2013-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 43 [patent_no_of_words] => 6084 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13776153 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/776153
Through vias and methods of formation thereof Feb 24, 2013 Issued
Array ( [id] => 8973671 [patent_doc_number] => 20130207102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-15 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/761399 [patent_app_country] => US [patent_app_date] => 2013-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 17383 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13761399 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/761399
SEMICONDUCTOR DEVICE Feb 6, 2013 Abandoned
Array ( [id] => 9789576 [patent_doc_number] => 20150001520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-01 [patent_title] => 'TRANSPARENT SUPPORTED ELECTRODE FOR AN OLED' [patent_app_type] => utility [patent_app_number] => 14/377657 [patent_app_country] => US [patent_app_date] => 2013-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5072 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14377657 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/377657
TRANSPARENT SUPPORTED ELECTRODE FOR AN OLED Feb 6, 2013 Abandoned
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