Search

Daniel St Cyr

Examiner (ID: 6316, Phone: (571)272-2407 , Office: P/2876 )

Most Active Art Unit
2876
Art Unit(s)
2876
Total Applications
2424
Issued Applications
1851
Pending Applications
196
Abandoned Applications
406

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9086231 [patent_doc_number] => 08557658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-15 [patent_title] => 'Multi-transistor non-volatile memory element' [patent_app_type] => utility [patent_app_number] => 13/195310 [patent_app_country] => US [patent_app_date] => 2011-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5915 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13195310 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/195310
Multi-transistor non-volatile memory element Jul 31, 2011 Issued
Array ( [id] => 7750543 [patent_doc_number] => 20120025348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'SEMICONDUCTOR DEVICE COMPRISING A PASSIVE COMPONENT OF CAPACITORS AND PROCESS FOR FABRICATION' [patent_app_type] => utility [patent_app_number] => 13/179640 [patent_app_country] => US [patent_app_date] => 2011-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3227 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20120025348.pdf [firstpage_image] =>[orig_patent_app_number] => 13179640 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/179640
Semiconductor device comprising a passive component of capacitors and process for fabrication Jul 10, 2011 Issued
Array ( [id] => 7505345 [patent_doc_number] => 20110253209 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'SOLAR CELL, METHOD OF FORMING EMITTER LAYER OF SOLAR CELL, AND METHOD OF MANUFACTURING SOLAR CELL' [patent_app_type] => utility [patent_app_number] => 13/172696 [patent_app_country] => US [patent_app_date] => 2011-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6390 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20110253209.pdf [firstpage_image] =>[orig_patent_app_number] => 13172696 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/172696
Solar cell, method of forming emitter layer of solar cell, and method of manufacturing solar cell Jun 28, 2011 Issued
Array ( [id] => 7510970 [patent_doc_number] => 20110256680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'NAND FLASH MEMORY ARRAY WITH CUT-OFF GATE LINE AND METHODS FOR OPERATING AND FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/170533 [patent_app_country] => US [patent_app_date] => 2011-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5532 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20110256680.pdf [firstpage_image] =>[orig_patent_app_number] => 13170533 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/170533
NAND flash memory array with cut-off gate line and methods for operating and fabricating the same Jun 27, 2011 Issued
Array ( [id] => 10138677 [patent_doc_number] => 09172000 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-27 [patent_title] => 'Semiconductor light emitting device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/167396 [patent_app_country] => US [patent_app_date] => 2011-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 4675 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13167396 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/167396
Semiconductor light emitting device and method of manufacturing the same Jun 22, 2011 Issued
Array ( [id] => 8064751 [patent_doc_number] => 20110244648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'Method of Manufacturing Nonvolatile Memory Device' [patent_app_type] => utility [patent_app_number] => 13/161204 [patent_app_country] => US [patent_app_date] => 2011-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5551 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0244/20110244648.pdf [firstpage_image] =>[orig_patent_app_number] => 13161204 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/161204
Method of Manufacturing Nonvolatile Memory Device Jun 14, 2011 Abandoned
Array ( [id] => 8522812 [patent_doc_number] => 20120322220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'METHOD OF PROCESSING MIM CAPACITORS TO REDUCE LEAKAGE CURRENT' [patent_app_type] => utility [patent_app_number] => 13/159842 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5539 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13159842 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/159842
Method of processing MIM capacitors to reduce leakage current Jun 13, 2011 Issued
Array ( [id] => 7662924 [patent_doc_number] => 20110312193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-22 [patent_title] => 'LASER PROCESSING METHOD' [patent_app_type] => utility [patent_app_number] => 13/160062 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 17046 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0312/20110312193.pdf [firstpage_image] =>[orig_patent_app_number] => 13160062 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/160062
Laser processing method Jun 13, 2011 Issued
Array ( [id] => 7662855 [patent_doc_number] => 20110312124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-22 [patent_title] => 'METHOD OF FABRICATING THIN FILM SOLAR CELL' [patent_app_type] => utility [patent_app_number] => 13/159823 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4307 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0312/20110312124.pdf [firstpage_image] =>[orig_patent_app_number] => 13159823 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/159823
Method of fabricating thin film solar cell Jun 13, 2011 Issued
Array ( [id] => 9589205 [patent_doc_number] => 08778745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-15 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/159830 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 37 [patent_no_of_words] => 22384 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13159830 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/159830
Method for manufacturing semiconductor device Jun 13, 2011 Issued
Array ( [id] => 8042479 [patent_doc_number] => 20120070974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'MANUFACTURE METHOD FOR SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/158892 [patent_app_country] => US [patent_app_date] => 2011-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 5502 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20120070974.pdf [firstpage_image] =>[orig_patent_app_number] => 13158892 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/158892
Manufacture method for semiconductor device Jun 12, 2011 Issued
Array ( [id] => 7669608 [patent_doc_number] => 20110318877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'DICING METHODS' [patent_app_type] => utility [patent_app_number] => 13/159192 [patent_app_country] => US [patent_app_date] => 2011-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 18658 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13159192 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/159192
Dicing methods Jun 12, 2011 Issued
Array ( [id] => 8232704 [patent_doc_number] => 08198144 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-12 [patent_title] => 'Pillar structure for memory device and method' [patent_app_type] => utility [patent_app_number] => 13/158231 [patent_app_country] => US [patent_app_date] => 2011-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 4312 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/198/08198144.pdf [firstpage_image] =>[orig_patent_app_number] => 13158231 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/158231
Pillar structure for memory device and method Jun 9, 2011 Issued
Array ( [id] => 9021045 [patent_doc_number] => 08531031 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-10 [patent_title] => 'Integrated circuit packages' [patent_app_type] => utility [patent_app_number] => 13/154540 [patent_app_country] => US [patent_app_date] => 2011-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 2855 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13154540 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/154540
Integrated circuit packages Jun 6, 2011 Issued
Array ( [id] => 8920880 [patent_doc_number] => 08486813 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-16 [patent_title] => 'Silicon wafer and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 13/150493 [patent_app_country] => US [patent_app_date] => 2011-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 29 [patent_no_of_words] => 8105 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13150493 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/150493
Silicon wafer and fabrication method thereof May 31, 2011 Issued
Array ( [id] => 7586905 [patent_doc_number] => 20110281415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-17 [patent_title] => 'METHODS OF FORMING AN ISOLATION LAYER AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES HAVING AN ISOLATION LAYER' [patent_app_type] => utility [patent_app_number] => 13/109527 [patent_app_country] => US [patent_app_date] => 2011-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7956 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0281/20110281415.pdf [firstpage_image] =>[orig_patent_app_number] => 13109527 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/109527
Methods of forming an isolation layer and methods of manufacturing semiconductor devices having an isolation layer May 16, 2011 Issued
Array ( [id] => 7564798 [patent_doc_number] => 20110284861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'LOW-TEMPERATURE POLYSILICON THIN FILM AND METHOD OF MANUFACTURING THE SAME, TRANSISTOR, AND DISPLAY APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/109356 [patent_app_country] => US [patent_app_date] => 2011-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2549 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20110284861.pdf [firstpage_image] =>[orig_patent_app_number] => 13109356 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/109356
LOW-TEMPERATURE POLYSILICON THIN FILM AND METHOD OF MANUFACTURING THE SAME, TRANSISTOR, AND DISPLAY APPARATUS May 16, 2011 Abandoned
Array ( [id] => 10035514 [patent_doc_number] => 09076839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-07 [patent_title] => 'Method for manufacturing SOI substrate' [patent_app_type] => utility [patent_app_number] => 13/106158 [patent_app_country] => US [patent_app_date] => 2011-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 32 [patent_no_of_words] => 18437 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13106158 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/106158
Method for manufacturing SOI substrate May 11, 2011 Issued
Array ( [id] => 8121703 [patent_doc_number] => 20120085402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-12 [patent_title] => 'METHOD FOR MANUFACTURING ELECTRODE OF DYE-SENSITIZED SOLAR CELL AND DYE-SENSITIZED SOLAR CELL HAVING ELECTRODE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/099603 [patent_app_country] => US [patent_app_date] => 2011-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6245 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20120085402.pdf [firstpage_image] =>[orig_patent_app_number] => 13099603 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/099603
Method for manufacturing electrode of dye-sensitized solar cell and dye-sensitized solar cell having electrode thereof May 2, 2011 Issued
Array ( [id] => 10042210 [patent_doc_number] => 09082924 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-14 [patent_title] => 'Method for preparing an N+PP+ or P+NN+ structure on silicon wafers' [patent_app_type] => utility [patent_app_number] => 13/643641 [patent_app_country] => US [patent_app_date] => 2011-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3759 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13643641 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/643641
Method for preparing an N+PP+ or P+NN+ structure on silicon wafers Apr 25, 2011 Issued
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