Search

Daniel V. Venne

Examiner (ID: 394)

Most Active Art Unit
3617
Art Unit(s)
3617, 3615
Total Applications
2006
Issued Applications
1406
Pending Applications
132
Abandoned Applications
502

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8430313 [patent_doc_number] => 20120252188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-04 [patent_title] => 'PLASMA PROCESSING METHOD AND DEVICE ISOLATION METHOD' [patent_app_type] => utility [patent_app_number] => 13/432151 [patent_app_country] => US [patent_app_date] => 2012-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11998 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13432151 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/432151
PLASMA PROCESSING METHOD AND DEVICE ISOLATION METHOD Mar 27, 2012 Abandoned
Array ( [id] => 8807696 [patent_doc_number] => 08445348 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-05-21 [patent_title] => 'Manufacturing method of a semiconductor component with a nanowire channel' [patent_app_type] => utility [patent_app_number] => 13/432011 [patent_app_country] => US [patent_app_date] => 2012-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4676 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13432011 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/432011
Manufacturing method of a semiconductor component with a nanowire channel Mar 27, 2012 Issued
Array ( [id] => 8694802 [patent_doc_number] => 20130056811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-07 [patent_title] => 'Hydrogen-Blocking Film for Ferroelectric Capacitors' [patent_app_type] => utility [patent_app_number] => 13/432736 [patent_app_country] => US [patent_app_date] => 2012-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5884 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13432736 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/432736
Hydrogen-Blocking Film for Ferroelectric Capacitors Mar 27, 2012 Abandoned
Array ( [id] => 8430333 [patent_doc_number] => 20120252208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-04 [patent_title] => 'METHOD OF FORMING METAL INTERCONNECTIONS OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/431446 [patent_app_country] => US [patent_app_date] => 2012-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4548 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13431446 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/431446
Method of forming metal interconnections of semiconductor device Mar 26, 2012 Issued
Array ( [id] => 8287305 [patent_doc_number] => 20120175632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'LIGHT EMITTING DEVICE' [patent_app_type] => utility [patent_app_number] => 13/423747 [patent_app_country] => US [patent_app_date] => 2012-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3495 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13423747 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/423747
Light emitting device Mar 18, 2012 Issued
Array ( [id] => 9441415 [patent_doc_number] => 08710528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-29 [patent_title] => 'Light emitting device' [patent_app_type] => utility [patent_app_number] => 13/422794 [patent_app_country] => US [patent_app_date] => 2012-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3115 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13422794 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/422794
Light emitting device Mar 15, 2012 Issued
Array ( [id] => 8265390 [patent_doc_number] => 20120164816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/414320 [patent_app_country] => US [patent_app_date] => 2012-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 10184 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13414320 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/414320
Method of manufacturing a semiconductor device Mar 6, 2012 Issued
Array ( [id] => 8250728 [patent_doc_number] => 20120155048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'WIRING BOARD, SEMICONDUCTOR APPARATUS AND METHOD OF MANUFACTURING THEM' [patent_app_type] => utility [patent_app_number] => 13/404627 [patent_app_country] => US [patent_app_date] => 2012-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9482 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20120155048.pdf [firstpage_image] =>[orig_patent_app_number] => 13404627 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/404627
Wiring board, semiconductor apparatus and method of manufacturing them Feb 23, 2012 Issued
Array ( [id] => 9818219 [patent_doc_number] => 08928006 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-06 [patent_title] => 'Substrate structure, method of forming the substrate structure and chip comprising the substrate structure' [patent_app_type] => utility [patent_app_number] => 13/988724 [patent_app_country] => US [patent_app_date] => 2012-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 6301 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13988724 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/988724
Substrate structure, method of forming the substrate structure and chip comprising the substrate structure Feb 20, 2012 Issued
Array ( [id] => 9402314 [patent_doc_number] => 08692368 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-08 [patent_title] => 'Integrated voltage regulator method with embedded passive device(s)' [patent_app_type] => utility [patent_app_number] => 13/367932 [patent_app_country] => US [patent_app_date] => 2012-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4473 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13367932 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/367932
Integrated voltage regulator method with embedded passive device(s) Feb 6, 2012 Issued
Array ( [id] => 10652466 [patent_doc_number] => 09368735 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-14 [patent_title] => 'Organic electroluminescence element and illumination device' [patent_app_type] => utility [patent_app_number] => 13/984713 [patent_app_country] => US [patent_app_date] => 2012-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 20869 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13984713 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/984713
Organic electroluminescence element and illumination device Feb 5, 2012 Issued
Array ( [id] => 9009214 [patent_doc_number] => 08524510 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-03 [patent_title] => 'Method for manufacturing magnetic memory chip device' [patent_app_type] => utility [patent_app_number] => 13/353004 [patent_app_country] => US [patent_app_date] => 2012-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 23 [patent_no_of_words] => 4351 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13353004 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/353004
Method for manufacturing magnetic memory chip device Jan 17, 2012 Issued
Array ( [id] => 11510255 [patent_doc_number] => 09601421 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-21 [patent_title] => 'BBUL material integration in-plane with embedded die for warpage control' [patent_app_type] => utility [patent_app_number] => 13/976356 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 24 [patent_no_of_words] => 6701 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13976356 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/976356
BBUL material integration in-plane with embedded die for warpage control Dec 29, 2011 Issued
Array ( [id] => 9631757 [patent_doc_number] => 20140209865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-31 [patent_title] => 'CONTACT TECHNIQUES AND CONFIGURATIONS FOR REDUCING PARASITIC RESISTANCE IN NANOWIRE TRANSISTORS' [patent_app_type] => utility [patent_app_number] => 13/997897 [patent_app_country] => US [patent_app_date] => 2011-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7777 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13997897 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/997897
Contact techniques and configurations for reducing parasitic resistance in nanowire transistors Dec 27, 2011 Issued
Array ( [id] => 9552920 [patent_doc_number] => 08759973 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-24 [patent_title] => 'Microelectronic assemblies having compliancy and methods therefor' [patent_app_type] => utility [patent_app_number] => 13/335022 [patent_app_country] => US [patent_app_date] => 2011-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 26 [patent_no_of_words] => 8395 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13335022 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/335022
Microelectronic assemblies having compliancy and methods therefor Dec 21, 2011 Issued
Array ( [id] => 8049411 [patent_doc_number] => 20120074439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'FLAT PANEL DISPLAY AND METHOD FOR MAKING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/271091 [patent_app_country] => US [patent_app_date] => 2011-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4435 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20120074439.pdf [firstpage_image] =>[orig_patent_app_number] => 13271091 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/271091
Flat panel display and method for making the same Oct 10, 2011 Issued
Array ( [id] => 9074241 [patent_doc_number] => 08551817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-08 [patent_title] => 'Semiconductor substrate cutting method' [patent_app_type] => utility [patent_app_number] => 13/269274 [patent_app_country] => US [patent_app_date] => 2011-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 10416 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 337 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13269274 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/269274
Semiconductor substrate cutting method Oct 6, 2011 Issued
Array ( [id] => 7717035 [patent_doc_number] => 20120007127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'OPTICAL-SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/240460 [patent_app_country] => US [patent_app_date] => 2011-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11610 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20120007127.pdf [firstpage_image] =>[orig_patent_app_number] => 13240460 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/240460
Optical-semiconductor device and method for manufacturing the same Sep 21, 2011 Issued
Array ( [id] => 7720364 [patent_doc_number] => 20120009699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'WAFER LEVEL LED PACKAGE STRUCTURE FOR INCREASE LIGHT-EMITTING EFFICIENCY AND METHOD FOR MAKING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/238101 [patent_app_country] => US [patent_app_date] => 2011-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4158 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20120009699.pdf [firstpage_image] =>[orig_patent_app_number] => 13238101 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/238101
WAFER LEVEL LED PACKAGE STRUCTURE FOR INCREASE LIGHT-EMITTING EFFICIENCY AND METHOD FOR MAKING THE SAME Sep 20, 2011 Abandoned
Array ( [id] => 9183748 [patent_doc_number] => 08623680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-07 [patent_title] => 'LED chip package structure using sedimentation and method for making the same' [patent_app_type] => utility [patent_app_number] => 13/232391 [patent_app_country] => US [patent_app_date] => 2011-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 4481 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13232391 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/232391
LED chip package structure using sedimentation and method for making the same Sep 13, 2011 Issued
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