Search

Daniel V. Venne

Examiner (ID: 394)

Most Active Art Unit
3617
Art Unit(s)
3617, 3615
Total Applications
2006
Issued Applications
1406
Pending Applications
132
Abandoned Applications
502

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6247221 [patent_doc_number] => 20100025775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-04 [patent_title] => 'Replacement spacers for mosfet fringe capacatance reduction and processes of making same' [patent_app_type] => utility [patent_app_number] => 12/220985 [patent_app_country] => US [patent_app_date] => 2008-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5387 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20100025775.pdf [firstpage_image] =>[orig_patent_app_number] => 12220985 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/220985
Replacement spacers for MOSFET fringe capacitance reduction and processes of making same Jul 29, 2008 Issued
Array ( [id] => 6255124 [patent_doc_number] => 20100029055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-04 [patent_title] => 'METHOD OF MANUFACTURING A DUAL CONTACT TRENCH CAPACITOR.' [patent_app_type] => utility [patent_app_number] => 12/181335 [patent_app_country] => US [patent_app_date] => 2008-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2804 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20100029055.pdf [firstpage_image] =>[orig_patent_app_number] => 12181335 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/181335
Method of manufacturing a dual contact trench capacitor Jul 28, 2008 Issued
Array ( [id] => 5527304 [patent_doc_number] => 20090197381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'METHOD FOR SELECTIVELY FORMING STRAIN IN A TRANSISTOR BY A STRESS MEMORIZATION TECHNIQUE WITHOUT ADDING ADDITIONAL LITHOGRAPHY STEPS' [patent_app_type] => utility [patent_app_number] => 12/179116 [patent_app_country] => US [patent_app_date] => 2008-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10804 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20090197381.pdf [firstpage_image] =>[orig_patent_app_number] => 12179116 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/179116
Method for selectively forming strain in a transistor by a stress memorization technique without adding additional lithography steps Jul 23, 2008 Issued
Array ( [id] => 5416498 [patent_doc_number] => 20090042385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-12 [patent_title] => 'METHOD OF MANUFACTURING METAL LINE' [patent_app_type] => utility [patent_app_number] => 12/177636 [patent_app_country] => US [patent_app_date] => 2008-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 978 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20090042385.pdf [firstpage_image] =>[orig_patent_app_number] => 12177636 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/177636
Method of manufacturing metal line Jul 21, 2008 Issued
Array ( [id] => 6478049 [patent_doc_number] => 20100213485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'VERTICAL LED WITH CONDUCTIVE VIAS' [patent_app_type] => utility [patent_app_number] => 12/669679 [patent_app_country] => US [patent_app_date] => 2008-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 14365 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20100213485.pdf [firstpage_image] =>[orig_patent_app_number] => 12669679 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/669679
Vertical LED with conductive vias Jul 17, 2008 Issued
Array ( [id] => 6502586 [patent_doc_number] => 20100013036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-21 [patent_title] => 'Thin Sacrificial Masking Films for Protecting Semiconductors From Pulsed Laser Process' [patent_app_type] => utility [patent_app_number] => 12/173903 [patent_app_country] => US [patent_app_date] => 2008-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4003 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20100013036.pdf [firstpage_image] =>[orig_patent_app_number] => 12173903 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/173903
Thin Sacrificial Masking Films for Protecting Semiconductors From Pulsed Laser Process Jul 15, 2008 Abandoned
Array ( [id] => 4644799 [patent_doc_number] => 08022405 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-20 [patent_title] => 'Light-emitting device' [patent_app_type] => utility [patent_app_number] => 12/219025 [patent_app_country] => US [patent_app_date] => 2008-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 32 [patent_no_of_words] => 17913 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/022/08022405.pdf [firstpage_image] =>[orig_patent_app_number] => 12219025 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/219025
Light-emitting device Jul 14, 2008 Issued
Array ( [id] => 43470 [patent_doc_number] => 07776624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-17 [patent_title] => 'Method for improving semiconductor surfaces' [patent_app_type] => utility [patent_app_number] => 12/168945 [patent_app_country] => US [patent_app_date] => 2008-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2530 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 324 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/776/07776624.pdf [firstpage_image] =>[orig_patent_app_number] => 12168945 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/168945
Method for improving semiconductor surfaces Jul 7, 2008 Issued
Array ( [id] => 4856557 [patent_doc_number] => 20080265407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'WAFER-LEVEL BONDING FOR MECHANICALLY REINFORCED ULTRA-THIN DIE' [patent_app_type] => utility [patent_app_number] => 12/168039 [patent_app_country] => US [patent_app_date] => 2008-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4746 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20080265407.pdf [firstpage_image] =>[orig_patent_app_number] => 12168039 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/168039
WAFER-LEVEL BONDING FOR MECHANICALLY REINFORCED ULTRA-THIN DIE Jul 2, 2008 Abandoned
Array ( [id] => 4451165 [patent_doc_number] => 07964488 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-21 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/165145 [patent_app_country] => US [patent_app_date] => 2008-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2232 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/964/07964488.pdf [firstpage_image] =>[orig_patent_app_number] => 12165145 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/165145
Semiconductor device and method for fabricating the same Jun 29, 2008 Issued
Array ( [id] => 6224689 [patent_doc_number] => 20100181580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-22 [patent_title] => 'LIGHT EMITTING APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/669093 [patent_app_country] => US [patent_app_date] => 2008-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 10357 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20100181580.pdf [firstpage_image] =>[orig_patent_app_number] => 12669093 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/669093
LIGHT EMITTING APPARATUS Jun 23, 2008 Abandoned
Array ( [id] => 5395126 [patent_doc_number] => 20090315189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-24 [patent_title] => 'Layered chip package and method of manufacturing same' [patent_app_type] => utility [patent_app_number] => 12/213645 [patent_app_country] => US [patent_app_date] => 2008-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 15258 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0315/20090315189.pdf [firstpage_image] =>[orig_patent_app_number] => 12213645 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/213645
Layered chip package and method of manufacturing same Jun 22, 2008 Issued
Array ( [id] => 173774 [patent_doc_number] => 07659153 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-09 [patent_title] => 'Sectional field effect devices and method of fabrication' [patent_app_type] => utility [patent_app_number] => 12/142849 [patent_app_country] => US [patent_app_date] => 2008-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 5119 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/659/07659153.pdf [firstpage_image] =>[orig_patent_app_number] => 12142849 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/142849
Sectional field effect devices and method of fabrication Jun 19, 2008 Issued
Array ( [id] => 23662 [patent_doc_number] => 07795127 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-14 [patent_title] => 'Electronic device manufacturing method and electronic device' [patent_app_type] => utility [patent_app_number] => 12/140706 [patent_app_country] => US [patent_app_date] => 2008-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 4712 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/795/07795127.pdf [firstpage_image] =>[orig_patent_app_number] => 12140706 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/140706
Electronic device manufacturing method and electronic device Jun 16, 2008 Issued
Array ( [id] => 6478928 [patent_doc_number] => 20100213584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'ULTRA WIDEBAND HERMETICALLY SEALED SURFACE MOUNT TECHNOLOGY FOR MICROWAVE MONOLITHIC INTEGRATED CIRCUIT PACKAGE' [patent_app_type] => utility [patent_app_number] => 12/681617 [patent_app_country] => US [patent_app_date] => 2008-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4287 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20100213584.pdf [firstpage_image] =>[orig_patent_app_number] => 12681617 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/681617
Ultra wideband hermetically sealed surface mount technology for microwave monolithic integrated circuit package Jun 15, 2008 Issued
Array ( [id] => 5364917 [patent_doc_number] => 20090302476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'Structures and Methods to Enhance CU Interconnect Electromigration (EM) Performance' [patent_app_type] => utility [patent_app_number] => 12/132806 [patent_app_country] => US [patent_app_date] => 2008-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3718 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20090302476.pdf [firstpage_image] =>[orig_patent_app_number] => 12132806 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/132806
Structures and methods to enhance Cu interconnect electromigration (EM) performance Jun 3, 2008 Issued
Array ( [id] => 5578691 [patent_doc_number] => 20090174037 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-09 [patent_title] => 'SEMICONDUCTOR SUBSTRATE, METHOD OF FABRICATING THE SAME, METHOD OF FABRICATING SEMICONDUCTOR DEVICE, AND METHOD OF FABRICATING IMAGE SENSOR' [patent_app_type] => utility [patent_app_number] => 12/132132 [patent_app_country] => US [patent_app_date] => 2008-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5336 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20090174037.pdf [firstpage_image] =>[orig_patent_app_number] => 12132132 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/132132
Semiconductor substrate, method of fabricating the same, method of fabricating semiconductor device, and method of fabricating image sensor Jun 2, 2008 Issued
Array ( [id] => 4792208 [patent_doc_number] => 20080293182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'Method for Manufacturing Image Sensor' [patent_app_type] => utility [patent_app_number] => 12/125635 [patent_app_country] => US [patent_app_date] => 2008-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2204 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0293/20080293182.pdf [firstpage_image] =>[orig_patent_app_number] => 12125635 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/125635
Method for Manufacturing Image Sensor May 21, 2008 Abandoned
Array ( [id] => 5278715 [patent_doc_number] => 20090130847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-21 [patent_title] => 'METHOD OF FABRICATING METAL PATTERN WITHOUT DAMAGING INSULATION LAYER' [patent_app_type] => utility [patent_app_number] => 12/123495 [patent_app_country] => US [patent_app_date] => 2008-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2461 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20090130847.pdf [firstpage_image] =>[orig_patent_app_number] => 12123495 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/123495
METHOD OF FABRICATING METAL PATTERN WITHOUT DAMAGING INSULATION LAYER May 19, 2008 Abandoned
Array ( [id] => 8017085 [patent_doc_number] => 08138045 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-20 [patent_title] => 'Method of forming sidewall spacers to reduce formation of recesses in the substrate and increase dopant retention in a semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/122885 [patent_app_country] => US [patent_app_date] => 2008-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2837 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/138/08138045.pdf [firstpage_image] =>[orig_patent_app_number] => 12122885 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/122885
Method of forming sidewall spacers to reduce formation of recesses in the substrate and increase dopant retention in a semiconductor device May 18, 2008 Issued
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