Search

Daniel V. Venne

Examiner (ID: 394)

Most Active Art Unit
3617
Art Unit(s)
3617, 3615
Total Applications
2006
Issued Applications
1406
Pending Applications
132
Abandoned Applications
502

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 74132 [patent_doc_number] => 07749886 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-06 [patent_title] => 'Microelectronic assemblies having compliancy and methods therefor' [patent_app_type] => utility [patent_app_number] => 11/643021 [patent_app_country] => US [patent_app_date] => 2006-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 26 [patent_no_of_words] => 8326 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/749/07749886.pdf [firstpage_image] =>[orig_patent_app_number] => 11643021 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/643021
Microelectronic assemblies having compliancy and methods therefor Dec 19, 2006 Issued
Array ( [id] => 5022994 [patent_doc_number] => 20070148960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-28 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/641037 [patent_app_country] => US [patent_app_date] => 2006-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2206 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20070148960.pdf [firstpage_image] =>[orig_patent_app_number] => 11641037 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/641037
Semiconductor device and method for manufacturing the same Dec 18, 2006 Issued
Array ( [id] => 5120098 [patent_doc_number] => 20070141812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-21 [patent_title] => 'Low temperature doped silicon layer formation' [patent_app_type] => utility [patent_app_number] => 11/640471 [patent_app_country] => US [patent_app_date] => 2006-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7208 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20070141812.pdf [firstpage_image] =>[orig_patent_app_number] => 11640471 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/640471
Low temperature doped silicon layer formation Dec 13, 2006 Issued
Array ( [id] => 5250585 [patent_doc_number] => 20070132041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-14 [patent_title] => 'Method for forming gate dielectric layers' [patent_app_type] => utility [patent_app_number] => 11/637705 [patent_app_country] => US [patent_app_date] => 2006-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1679 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20070132041.pdf [firstpage_image] =>[orig_patent_app_number] => 11637705 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/637705
Method for forming gate dielectric layers Dec 12, 2006 Issued
Array ( [id] => 285401 [patent_doc_number] => 07550327 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-23 [patent_title] => 'Method for fabricating thin film transistor substrate' [patent_app_type] => utility [patent_app_number] => 11/607845 [patent_app_country] => US [patent_app_date] => 2006-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 7180 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/550/07550327.pdf [firstpage_image] =>[orig_patent_app_number] => 11607845 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/607845
Method for fabricating thin film transistor substrate Dec 3, 2006 Issued
Array ( [id] => 5188605 [patent_doc_number] => 20070166913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-19 [patent_title] => 'Semiconductor device and method of forming the same' [patent_app_type] => utility [patent_app_number] => 11/606891 [patent_app_country] => US [patent_app_date] => 2006-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3712 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20070166913.pdf [firstpage_image] =>[orig_patent_app_number] => 11606891 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/606891
Semiconductor device and method of forming the same Nov 30, 2006 Abandoned
Array ( [id] => 4963104 [patent_doc_number] => 20080105924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-08 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/563911 [patent_app_country] => US [patent_app_date] => 2006-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2018 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20080105924.pdf [firstpage_image] =>[orig_patent_app_number] => 11563911 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/563911
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Nov 27, 2006 Abandoned
Array ( [id] => 4644298 [patent_doc_number] => 08021903 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-20 [patent_title] => 'Method for fabricating micro-lens and micro-lens integrated optoelectronic devices using selective etch of compound semiconductor' [patent_app_type] => utility [patent_app_number] => 12/085585 [patent_app_country] => US [patent_app_date] => 2006-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 3000 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/021/08021903.pdf [firstpage_image] =>[orig_patent_app_number] => 12085585 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/085585
Method for fabricating micro-lens and micro-lens integrated optoelectronic devices using selective etch of compound semiconductor Nov 27, 2006 Issued
Array ( [id] => 5079699 [patent_doc_number] => 20070122923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-31 [patent_title] => 'Flat panel display and method for making the same' [patent_app_type] => utility [patent_app_number] => 11/595217 [patent_app_country] => US [patent_app_date] => 2006-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4416 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20070122923.pdf [firstpage_image] =>[orig_patent_app_number] => 11595217 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/595217
Flat panel display and method for making the same Nov 8, 2006 Issued
Array ( [id] => 63649 [patent_doc_number] => 07759182 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-20 [patent_title] => 'Dummy active area implementation' [patent_app_type] => utility [patent_app_number] => 11/594601 [patent_app_country] => US [patent_app_date] => 2006-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 5443 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/759/07759182.pdf [firstpage_image] =>[orig_patent_app_number] => 11594601 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/594601
Dummy active area implementation Nov 7, 2006 Issued
Array ( [id] => 4820808 [patent_doc_number] => 20080122078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-29 [patent_title] => 'Systems and methods to passivate on-die redistribution interconnects' [patent_app_type] => utility [patent_app_number] => 11/595645 [patent_app_country] => US [patent_app_date] => 2006-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 5707 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20080122078.pdf [firstpage_image] =>[orig_patent_app_number] => 11595645 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/595645
Systems and methods to passivate on-die redistribution interconnects Nov 7, 2006 Abandoned
Array ( [id] => 5014081 [patent_doc_number] => 20070257289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-08 [patent_title] => 'Liquid crystal display device and fabricating method thereof' [patent_app_type] => utility [patent_app_number] => 11/591584 [patent_app_country] => US [patent_app_date] => 2006-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7150 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20070257289.pdf [firstpage_image] =>[orig_patent_app_number] => 11591584 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/591584
Liquid crystal display device and fabricating method thereof Nov 1, 2006 Issued
Array ( [id] => 246990 [patent_doc_number] => 07585742 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-08 [patent_title] => 'Semiconductor device manufacturing method' [patent_app_type] => utility [patent_app_number] => 11/536291 [patent_app_country] => US [patent_app_date] => 2006-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 8560 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/585/07585742.pdf [firstpage_image] =>[orig_patent_app_number] => 11536291 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/536291
Semiconductor device manufacturing method Sep 27, 2006 Issued
Array ( [id] => 4938898 [patent_doc_number] => 20080076217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-27 [patent_title] => 'Methods of Reducing Coupling Between Floating Gates in Nonvolatile Memory' [patent_app_type] => utility [patent_app_number] => 11/534135 [patent_app_country] => US [patent_app_date] => 2006-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9943 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20080076217.pdf [firstpage_image] =>[orig_patent_app_number] => 11534135 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/534135
Methods of reducing coupling between floating gates in nonvolatile memory Sep 20, 2006 Issued
Array ( [id] => 4922052 [patent_doc_number] => 20080070367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-20 [patent_title] => 'Methods to create dual-gate dielectrics in transistors using high-K dielectric' [patent_app_type] => utility [patent_app_number] => 11/521638 [patent_app_country] => US [patent_app_date] => 2006-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3851 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20080070367.pdf [firstpage_image] =>[orig_patent_app_number] => 11521638 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/521638
Methods to create dual-gate dielectrics in transistors using high-K dielectric Sep 13, 2006 Abandoned
Array ( [id] => 4492970 [patent_doc_number] => 07955969 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-07 [patent_title] => 'Ultra thin FET' [patent_app_type] => utility [patent_app_number] => 11/530166 [patent_app_country] => US [patent_app_date] => 2006-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 1991 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/955/07955969.pdf [firstpage_image] =>[orig_patent_app_number] => 11530166 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/530166
Ultra thin FET Sep 7, 2006 Issued
Array ( [id] => 4820625 [patent_doc_number] => 20080121951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-29 [patent_title] => 'CMOS IMAGE SENSOR PROCESS AND STRUCTURE' [patent_app_type] => utility [patent_app_number] => 11/470631 [patent_app_country] => US [patent_app_date] => 2006-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2954 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20080121951.pdf [firstpage_image] =>[orig_patent_app_number] => 11470631 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/470631
CMOS image sensor process and structure Sep 6, 2006 Issued
Array ( [id] => 71581 [patent_doc_number] => 07754590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-13 [patent_title] => 'Method of manufacturing a semiconductor device comprising a field stop zone at a specific depth' [patent_app_type] => utility [patent_app_number] => 11/468372 [patent_app_country] => US [patent_app_date] => 2006-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3113 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/754/07754590.pdf [firstpage_image] =>[orig_patent_app_number] => 11468372 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/468372
Method of manufacturing a semiconductor device comprising a field stop zone at a specific depth Aug 29, 2006 Issued
Array ( [id] => 4822819 [patent_doc_number] => 20080123176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-29 [patent_title] => 'PROCESS FOR CREATING OHMIC CONTACT' [patent_app_type] => utility [patent_app_number] => 11/467979 [patent_app_country] => US [patent_app_date] => 2006-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3813 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20080123176.pdf [firstpage_image] =>[orig_patent_app_number] => 11467979 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/467979
PROCESS FOR CREATING OHMIC CONTACT Aug 28, 2006 Abandoned
Array ( [id] => 4733900 [patent_doc_number] => 20080050879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-28 [patent_title] => 'METHODS OF FORMING METAL-CONTAINING GATE STRUCTURES' [patent_app_type] => utility [patent_app_number] => 11/466656 [patent_app_country] => US [patent_app_date] => 2006-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2782 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20080050879.pdf [firstpage_image] =>[orig_patent_app_number] => 11466656 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/466656
METHODS OF FORMING METAL-CONTAINING GATE STRUCTURES Aug 22, 2006 Abandoned
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