Search

Daniel V. Venne

Examiner (ID: 394)

Most Active Art Unit
3617
Art Unit(s)
3617, 3615
Total Applications
2006
Issued Applications
1406
Pending Applications
132
Abandoned Applications
502

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5171988 [patent_doc_number] => 20070072421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Method to passivate defects in integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/234922 [patent_app_country] => US [patent_app_date] => 2005-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1108 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20070072421.pdf [firstpage_image] =>[orig_patent_app_number] => 11234922 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/234922
Method to passivate defects in integrated circuits Sep 25, 2005 Abandoned
Array ( [id] => 5154433 [patent_doc_number] => 20070037316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-15 [patent_title] => 'Memory cell contact using spacers' [patent_app_type] => utility [patent_app_number] => 11/199252 [patent_app_country] => US [patent_app_date] => 2005-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3230 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20070037316.pdf [firstpage_image] =>[orig_patent_app_number] => 11199252 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/199252
Memory cell contact using spacers Aug 8, 2005 Abandoned
Array ( [id] => 5796455 [patent_doc_number] => 20060033132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-16 [patent_title] => 'Low dark current image sensors with epitaxial SiC and/or carbonated channels for array transistors' [patent_app_type] => utility [patent_app_number] => 11/198292 [patent_app_country] => US [patent_app_date] => 2005-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5076 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20060033132.pdf [firstpage_image] =>[orig_patent_app_number] => 11198292 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/198292
Low dark current image sensors with epitaxial SiC and/or carbonated channels for array transistors Aug 7, 2005 Issued
Array ( [id] => 5672606 [patent_doc_number] => 20060177961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-10 [patent_title] => 'Method for fabricating organic thin film transistor by application of electric field' [patent_app_type] => utility [patent_app_number] => 11/196382 [patent_app_country] => US [patent_app_date] => 2005-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4286 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20060177961.pdf [firstpage_image] =>[orig_patent_app_number] => 11196382 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/196382
Method for increasing mobility of an organic thin film transistor by application of an electric field Aug 3, 2005 Issued
Array ( [id] => 5051514 [patent_doc_number] => 20070032059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Method of manufacturing a semiconductor structure having a wafer through-contact and a corresponding semiconductor structure' [patent_app_type] => utility [patent_app_number] => 11/195462 [patent_app_country] => US [patent_app_date] => 2005-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2076 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20070032059.pdf [firstpage_image] =>[orig_patent_app_number] => 11195462 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/195462
Method of manufacturing a semiconductor structure having a wafer through-contact and a corresponding semiconductor structure Aug 1, 2005 Abandoned
Array ( [id] => 899790 [patent_doc_number] => 07338835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-04 [patent_title] => 'OFETs with active channels formed of densified layers' [patent_app_type] => utility [patent_app_number] => 11/177602 [patent_app_country] => US [patent_app_date] => 2005-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4620 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/338/07338835.pdf [firstpage_image] =>[orig_patent_app_number] => 11177602 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/177602
OFETs with active channels formed of densified layers Jul 7, 2005 Issued
Array ( [id] => 318596 [patent_doc_number] => 07521305 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-21 [patent_title] => 'Method for fabricating semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/140952 [patent_app_country] => US [patent_app_date] => 2005-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 3214 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/521/07521305.pdf [firstpage_image] =>[orig_patent_app_number] => 11140952 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/140952
Method for fabricating semiconductor device May 31, 2005 Issued
Array ( [id] => 5608552 [patent_doc_number] => 20060270068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-30 [patent_title] => 'Method for fabricating right-angle holes in a substrate' [patent_app_type] => utility [patent_app_number] => 11/141791 [patent_app_country] => US [patent_app_date] => 2005-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3427 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0270/20060270068.pdf [firstpage_image] =>[orig_patent_app_number] => 11141791 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/141791
Method for fabricating right-angle holes in a substrate May 30, 2005 Issued
Array ( [id] => 5625524 [patent_doc_number] => 20060264029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Low inductance via structures' [patent_app_type] => utility [patent_app_number] => 11/135112 [patent_app_country] => US [patent_app_date] => 2005-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2727 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20060264029.pdf [firstpage_image] =>[orig_patent_app_number] => 11135112 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/135112
Low inductance via structures May 22, 2005 Abandoned
Array ( [id] => 102070 [patent_doc_number] => 07727865 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-01 [patent_title] => 'Method for controlling conductivity of Ga2O3single crystal' [patent_app_type] => utility [patent_app_number] => 10/589852 [patent_app_country] => US [patent_app_date] => 2005-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4815 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/727/07727865.pdf [firstpage_image] =>[orig_patent_app_number] => 10589852 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/589852
Method for controlling conductivity of Ga2O3single crystal Jan 13, 2005 Issued
Array ( [id] => 5188652 [patent_doc_number] => 20070166960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-19 [patent_title] => 'Method for forming a strained si-channel in a mosfet structure' [patent_app_type] => utility [patent_app_number] => 10/596422 [patent_app_country] => US [patent_app_date] => 2004-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3008 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20070166960.pdf [firstpage_image] =>[orig_patent_app_number] => 10596422 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/596422
Method for forming a strained Si-channel in a MOSFET structure Nov 29, 2004 Issued
Array ( [id] => 220974 [patent_doc_number] => 07608520 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-27 [patent_title] => 'Method for bonding substrate, bonded substrate, and direct bonded substrate' [patent_app_type] => utility [patent_app_number] => 10/569100 [patent_app_country] => US [patent_app_date] => 2004-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 22 [patent_no_of_words] => 10868 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/608/07608520.pdf [firstpage_image] =>[orig_patent_app_number] => 10569100 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/569100
Method for bonding substrate, bonded substrate, and direct bonded substrate Nov 3, 2004 Issued
Array ( [id] => 4980543 [patent_doc_number] => 20070085099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-19 [patent_title] => 'Semiconductor substrate cutting method' [patent_app_type] => utility [patent_app_number] => 10/571142 [patent_app_country] => US [patent_app_date] => 2004-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 10416 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20070085099.pdf [firstpage_image] =>[orig_patent_app_number] => 10571142 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/571142
Semiconductor substrate cutting method Sep 8, 2004 Abandoned
Array ( [id] => 195860 [patent_doc_number] => 07635639 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-22 [patent_title] => 'Method for the interconnection of active and passive components and resulting thin heterogeneous component' [patent_app_type] => utility [patent_app_number] => 10/562685 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4868 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/635/07635639.pdf [firstpage_image] =>[orig_patent_app_number] => 10562685 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/562685
Method for the interconnection of active and passive components and resulting thin heterogeneous component Jun 29, 2004 Issued
Array ( [id] => 5008034 [patent_doc_number] => 20070278511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-06 [patent_title] => 'Light-Emitting Device Manufacturing Method and Light-Emitting Device' [patent_app_type] => utility [patent_app_number] => 10/592006 [patent_app_country] => US [patent_app_date] => 2004-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 12592 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20070278511.pdf [firstpage_image] =>[orig_patent_app_number] => 10592006 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/592006
Light-emitting device manufacturing method and light-emitting device Mar 23, 2004 Issued
Array ( [id] => 4444552 [patent_doc_number] => 07863113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Transistor for active matrix display and a method for producing said transistor' [patent_app_type] => utility [patent_app_number] => 10/544787 [patent_app_country] => US [patent_app_date] => 2004-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3061 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/863/07863113.pdf [firstpage_image] =>[orig_patent_app_number] => 10544787 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/544787
Transistor for active matrix display and a method for producing said transistor Feb 5, 2004 Issued
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