Daniell L Negron

Array ( [id] => 16864292 [patent_doc_number] => 11023031 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-01 [patent_title] => Image processing apparatus, method and computer-readable medium [patent_app_type] => utility [patent_app_number] => 15/939424 [patent_app_country] => US [patent_app_date] => 2018-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 13207 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 376 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15939424 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16698364 [patent_doc_number] => 10948961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Electronic device, method and computer-readable medium [patent_app_type] => utility [patent_app_number] => 15/939453 [patent_app_country] => US [patent_app_date] => 2018-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7597 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15939453 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16651702 [patent_doc_number] => 10928875 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-23 [patent_title] => Charge control method and electronic device based on voltage of battery [patent_app_type] => utility [patent_app_number] => 15/920978 [patent_app_country] => US [patent_app_date] => 2018-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 17512 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15920978 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13437013 [patent_doc_number] => 20180270049 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-20 [patent_title] => TECHNIQUES FOR PREVENTING ABUSE OF BOOTSTRAPPING INFORMATION IN AN AUTHENTICATION PROTOCOL [patent_app_type] => utility [patent_app_number] => 15/921463 [patent_app_country] => US [patent_app_date] => 2018-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15921463 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13466665 [patent_doc_number] => 20180284875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => POWER CONSUMPTION REDUCTION DEVICE, POWER CONSUMPTION REDUCTION METHOD, AND POWER CONSUMPTION REDUCTION PROGRAM [patent_app_type] => utility [patent_app_number] => 15/920738 [patent_app_country] => US [patent_app_date] => 2018-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7685 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15920738 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14754413 [patent_doc_number] => 20190260380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => REDUCING CHIP LATENCY AT A CLOCK BOUNDARY BY REFERENCE CLOCK PHASE ADJUSTMENT [patent_app_type] => utility [patent_app_number] => 15/899370 [patent_app_country] => US [patent_app_date] => 2018-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10342 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15899370 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16247944 [patent_doc_number] => 10747298 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Dynamic interrupt rate control in computing system [patent_app_type] => utility [patent_app_number] => 15/899157 [patent_app_country] => US [patent_app_date] => 2018-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5276 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15899157 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13375737 [patent_doc_number] => 20180239410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-23 [patent_title] => UNIVERSAL SERIAL BUS POWER DELIVERY (USB PD)-BASED BATTERY CHARGING [patent_app_type] => utility [patent_app_number] => 15/898055 [patent_app_country] => US [patent_app_date] => 2018-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17903 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15898055 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14719253 [patent_doc_number] => 20190250690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => VIDEO PLAYBACK ENERGY CONSUMPTION CONTROL [patent_app_type] => utility [patent_app_number] => 15/892633 [patent_app_country] => US [patent_app_date] => 2018-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6608 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15892633 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16064489 [patent_doc_number] => 10691188 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Electronic device comprising a first circuit and a switchable second circuit [patent_app_type] => utility [patent_app_number] => 15/892164 [patent_app_country] => US [patent_app_date] => 2018-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6985 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15892164 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12774880 [patent_doc_number] => 20180150128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-31 [patent_title] => ELECTRONIC DEVICE CAPABLE OF REDUCING POWER CONSUMPTION AND METHOD FOR REDUCING POWER CONSUMPTION OF ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 15/882612 [patent_app_country] => US [patent_app_date] => 2018-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4867 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15882612 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14505817 [patent_doc_number] => 20190196563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => Cost-Effective Clock Structure For Digital Systems And Methods Thereof [patent_app_type] => utility [patent_app_number] => 15/852185 [patent_app_country] => US [patent_app_date] => 2017-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5990 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15852185 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17437589 [patent_doc_number] => 11262921 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-01 [patent_title] => Partial area self refresh mode [patent_app_type] => utility [patent_app_number] => 15/851504 [patent_app_country] => US [patent_app_date] => 2017-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6942 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15851504 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16307343 [patent_doc_number] => 10776135 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-15 [patent_title] => Automated setting customization using real-time user data [patent_app_type] => utility [patent_app_number] => 15/817371 [patent_app_country] => US [patent_app_date] => 2017-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7584 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15817371 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15505453 [patent_doc_number] => 20200052915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => METHOD FOR MANAGING AN OPERATING MODE OF AN ITEM OF EQUIPMENT [patent_app_type] => utility [patent_app_number] => 16/342791 [patent_app_country] => US [patent_app_date] => 2017-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6967 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16342791 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14458265 [patent_doc_number] => 10325096 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-06-18 [patent_title] => Modifying a portion of a read-only file system [patent_app_type] => utility [patent_app_number] => 15/688601 [patent_app_country] => US [patent_app_date] => 2017-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 9370 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15688601 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15918923 [patent_doc_number] => 10656699 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Predictive power capping and power allocation to computing nodes in a rack-based information handling system [patent_app_type] => utility [patent_app_number] => 15/667857 [patent_app_country] => US [patent_app_date] => 2017-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 10595 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15667857 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13579897 [patent_doc_number] => 20180341497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-29 [patent_title] => System and Method to Configure Communication Lanes of a Central Processing Unit [patent_app_type] => utility [patent_app_number] => 15/605172 [patent_app_country] => US [patent_app_date] => 2017-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5710 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15605172 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16145039 [patent_doc_number] => 10705589 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-07 [patent_title] => System and method for associative power and clock management with instruction governed operation for power efficient computing [patent_app_type] => utility [patent_app_number] => 15/604098 [patent_app_country] => US [patent_app_date] => 2017-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 8349 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15604098 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13569127 [patent_doc_number] => 20180336111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-22 [patent_title] => System, Apparatus And Method For Performing In-Field Self-Testing Of A Processor [patent_app_type] => utility [patent_app_number] => 15/599587 [patent_app_country] => US [patent_app_date] => 2017-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18887 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15599587 [rel_patent_id] =>[rel_patent_doc_number] =>)