Danielle Jackson

Array ( [id] => 1521732 [patent_doc_number] => 06502175 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-31 [patent_title] => 'Method and apparatus for locating caches in a network to optimize performance' [patent_app_type] => B1 [patent_app_number] => 09/282760 [patent_app_country] => US [patent_app_date] => 1999-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3661 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/502/06502175.pdf [firstpage_image] =>[orig_patent_app_number] => 09282760 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1339262 [patent_doc_number] => 06601147 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-29 [patent_title] => 'Computer system and method for maintaining an integrated shared buffer memory in a group of interconnected hosts' [patent_app_type] => B1 [patent_app_number] => 09/282891 [patent_app_country] => US [patent_app_date] => 1999-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1582 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/601/06601147.pdf [firstpage_image] =>[orig_patent_app_number] => 09282891 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1540066 [patent_doc_number] => 06338119 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-08 [patent_title] => 'Method and apparatus with page buffer and I/O page kill definition for improved DMA and L1/L2 cache performance' [patent_app_type] => B1 [patent_app_number] => 09/282631 [patent_app_country] => US [patent_app_date] => 1999-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5340 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/338/06338119.pdf [firstpage_image] =>[orig_patent_app_number] => 09282631 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1568636 [patent_doc_number] => 06339809 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-15 [patent_title] => 'Memory unit and buffer access control circuit for updating an address when consecutively accessing upper and lower buffers' [patent_app_type] => B1 [patent_app_number] => 09/281232 [patent_app_country] => US [patent_app_date] => 1999-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 8548 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/339/06339809.pdf [firstpage_image] =>[orig_patent_app_number] => 09281232 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1430402 [patent_doc_number] => 06526493 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-25 [patent_title] => 'Method and apparatus for partitioning and formatting a storage media without rebooting by creating a logical device control block (DCB) on-the-fly' [patent_app_type] => B1 [patent_app_number] => 09/281596 [patent_app_country] => US [patent_app_date] => 1999-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3731 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/526/06526493.pdf [firstpage_image] =>[orig_patent_app_number] => 09281596 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1462392 [patent_doc_number] => 06427186 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-30 [patent_title] => 'Memory, interface system and method for mapping logical block numbers to physical sector numbers in a flash memory, using a master index table and a table of physical sector numbers' [patent_app_type] => B1 [patent_app_number] => 09/281630 [patent_app_country] => US [patent_app_date] => 1999-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 5604 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/427/06427186.pdf [firstpage_image] =>[orig_patent_app_number] => 09281630 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1179028 [patent_doc_number] => 06757791 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-29 [patent_title] => 'Method and apparatus for reordering packet data units in storage queues for reading and writing memory' [patent_app_type] => B1 [patent_app_number] => 09/282080 [patent_app_country] => US [patent_app_date] => 1999-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3616 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/757/06757791.pdf [firstpage_image] =>[orig_patent_app_number] => 09282080 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4333147 [patent_doc_number] => 06317808 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'Data storage system and method of routing or assigning disk write requests among a set of disks using weighted available disk space values' [patent_app_type] => 1 [patent_app_number] => 9/277051 [patent_app_country] => US [patent_app_date] => 1999-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4961 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/317/06317808.pdf [firstpage_image] =>[orig_patent_app_number] => 277051 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1444099 [patent_doc_number] => 06496912 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'System, method, and software for memory management with intelligent trimming of pages of working sets' [patent_app_type] => B1 [patent_app_number] => 09/276271 [patent_app_country] => US [patent_app_date] => 1999-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5178 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496912.pdf [firstpage_image] =>[orig_patent_app_number] => 09276271 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1429270 [patent_doc_number] => 06530000 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-04 [patent_title] => 'Methods and systems for arbitrating access to a disk controller buffer memory by allocating various amounts of times to different accessing units' [patent_app_type] => B1 [patent_app_number] => 09/275629 [patent_app_country] => US [patent_app_date] => 1999-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 7372 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/530/06530000.pdf [firstpage_image] =>[orig_patent_app_number] => 09275629 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1480898 [patent_doc_number] => 06389489 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Data processing system having a fifo buffer with variable threshold value based on input and output data rates and data block size' [patent_app_type] => B1 [patent_app_number] => 09/271215 [patent_app_country] => US [patent_app_date] => 1999-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3146 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/389/06389489.pdf [firstpage_image] =>[orig_patent_app_number] => 09271215 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6908607 [patent_doc_number] => 20010011374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-02 [patent_title] => 'STATISTICAL DISK SCHEDULING FOR VIDEO SERVERS' [patent_app_type] => new [patent_app_number] => 09/268512 [patent_app_country] => US [patent_app_date] => 1999-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5490 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20010011374.pdf [firstpage_image] =>[orig_patent_app_number] => 09268512 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1481745 [patent_doc_number] => 06345345 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-05 [patent_title] => 'Data communications device and associated method for arbitrating access using dynamically programmable arbitration scheme and limits on data transfers' [patent_app_type] => B1 [patent_app_number] => 09/236586 [patent_app_country] => US [patent_app_date] => 1999-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4855 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/345/06345345.pdf [firstpage_image] =>[orig_patent_app_number] => 09236586 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4399226 [patent_doc_number] => 06295582 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-25 [patent_title] => 'System and method for managing data in an asynchronous I/O cache memory to maintain a predetermined amount of storage space that is readily available' [patent_app_type] => 1 [patent_app_number] => 9/232194 [patent_app_country] => US [patent_app_date] => 1999-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 9804 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/295/06295582.pdf [firstpage_image] =>[orig_patent_app_number] => 232194 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1592286 [patent_doc_number] => 06360294 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Device and method for simultaneously reading/rewriting a dynamic random-access memory cell using a plurality of amplifiers and isolation circuitry' [patent_app_type] => B1 [patent_app_number] => 09/231423 [patent_app_country] => US [patent_app_date] => 1999-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2139 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/360/06360294.pdf [firstpage_image] =>[orig_patent_app_number] => 09231423 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4194907 [patent_doc_number] => 06085287 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'Method and apparatus for enhancing the disk cache process by dynamically sizing prefetch data associated with read requests based upon the current cache hit rate' [patent_app_type] => 1 [patent_app_number] => 9/221632 [patent_app_country] => US [patent_app_date] => 1998-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5153 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/085/06085287.pdf [firstpage_image] =>[orig_patent_app_number] => 221632 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1584808 [patent_doc_number] => 06449696 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-09-10 [patent_title] => 'Device and method for input/output control of a computer system for efficient prefetching of data based on lists of data read requests for different computers and time between access requests' [patent_app_type] => B2 [patent_app_number] => 09/219763 [patent_app_country] => US [patent_app_date] => 1998-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 12520 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/449/06449696.pdf [firstpage_image] =>[orig_patent_app_number] => 09219763 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4403965 [patent_doc_number] => 06263409 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-17 [patent_title] => 'Data processing system and method for substituting one type of request for another for increased performance when processing back-to-back requests of certain types' [patent_app_type] => 1 [patent_app_number] => 9/218383 [patent_app_country] => US [patent_app_date] => 1998-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 15846 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/263/06263409.pdf [firstpage_image] =>[orig_patent_app_number] => 218383 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6226724 [patent_doc_number] => 20020004879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-10 [patent_title] => 'BURST LENGTH DISCRIMINATING CIRCUIT FOR USE IN SYNCHRONOUS SEMICONDUCTOR MEMORY AND HAVING A PREDETERMINED INITIALIZED \nSTATE OF POWER-UP' [patent_app_type] => new [patent_app_number] => 09/207619 [patent_app_country] => US [patent_app_date] => 1998-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4413 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20020004879.pdf [firstpage_image] =>[orig_patent_app_number] => 09207619 [rel_patent_id] =>[rel_patent_doc_number] =>)