Search

Danielle Jackson

Examiner (ID: 13276, Phone: (571)272-2268 , Office: P/3636 )

Most Active Art Unit
3636
Art Unit(s)
3636
Total Applications
1037
Issued Applications
648
Pending Applications
53
Abandoned Applications
355

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3816124 [patent_doc_number] => 05829053 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-27 [patent_title] => 'Block storage memory management system and method utilizing independent partition managers and device drivers' [patent_app_type] => 1 [patent_app_number] => 8/644412 [patent_app_country] => US [patent_app_date] => 1996-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4855 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/829/05829053.pdf [firstpage_image] =>[orig_patent_app_number] => 644412 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/644412
Block storage memory management system and method utilizing independent partition managers and device drivers May 9, 1996 Issued
Array ( [id] => 3816124 [patent_doc_number] => 05829053 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-27 [patent_title] => 'Block storage memory management system and method utilizing independent partition managers and device drivers' [patent_app_type] => 1 [patent_app_number] => 8/644412 [patent_app_country] => US [patent_app_date] => 1996-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4855 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/829/05829053.pdf [firstpage_image] =>[orig_patent_app_number] => 644412 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/644412
Block storage memory management system and method utilizing independent partition managers and device drivers May 9, 1996 Issued
Array ( [id] => 3816124 [patent_doc_number] => 05829053 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-27 [patent_title] => 'Block storage memory management system and method utilizing independent partition managers and device drivers' [patent_app_type] => 1 [patent_app_number] => 8/644412 [patent_app_country] => US [patent_app_date] => 1996-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4855 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/829/05829053.pdf [firstpage_image] =>[orig_patent_app_number] => 644412 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/644412
Block storage memory management system and method utilizing independent partition managers and device drivers May 9, 1996 Issued
Array ( [id] => 3816124 [patent_doc_number] => 05829053 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-27 [patent_title] => 'Block storage memory management system and method utilizing independent partition managers and device drivers' [patent_app_type] => 1 [patent_app_number] => 8/644412 [patent_app_country] => US [patent_app_date] => 1996-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4855 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/829/05829053.pdf [firstpage_image] =>[orig_patent_app_number] => 644412 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/644412
Block storage memory management system and method utilizing independent partition managers and device drivers May 9, 1996 Issued
Array ( [id] => 3765448 [patent_doc_number] => 05802569 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Computer system having cache prefetching amount based on CPU request types' [patent_app_type] => 1 [patent_app_number] => 8/636112 [patent_app_country] => US [patent_app_date] => 1996-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3145 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/802/05802569.pdf [firstpage_image] =>[orig_patent_app_number] => 636112 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/636112
Computer system having cache prefetching amount based on CPU request types Apr 21, 1996 Issued
Array ( [id] => 4020104 [patent_doc_number] => 05860134 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Memory system with memory presence and type detection using multiplexed memory line function' [patent_app_type] => 1 [patent_app_number] => 8/623352 [patent_app_country] => US [patent_app_date] => 1996-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 8806 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/860/05860134.pdf [firstpage_image] =>[orig_patent_app_number] => 623352 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/623352
Memory system with memory presence and type detection using multiplexed memory line function Mar 27, 1996 Issued
Array ( [id] => 3960280 [patent_doc_number] => 05930820 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Data cache and method using a stack memory for storing stack data separate from cache line storage' [patent_app_type] => 1 [patent_app_number] => 8/617412 [patent_app_country] => US [patent_app_date] => 1996-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6433 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/930/05930820.pdf [firstpage_image] =>[orig_patent_app_number] => 617412 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/617412
Data cache and method using a stack memory for storing stack data separate from cache line storage Mar 17, 1996 Issued
Array ( [id] => 3765496 [patent_doc_number] => 05802572 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Write-back cache having sub-line size coherency granularity and method for maintaining coherency within a write-back cache' [patent_app_type] => 1 [patent_app_number] => 8/616612 [patent_app_country] => US [patent_app_date] => 1996-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3236 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/802/05802572.pdf [firstpage_image] =>[orig_patent_app_number] => 616612 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/616612
Write-back cache having sub-line size coherency granularity and method for maintaining coherency within a write-back cache Mar 14, 1996 Issued
Array ( [id] => 3996014 [patent_doc_number] => 05918245 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Microprocessor having a cache memory system using multi-level cache set prediction' [patent_app_type] => 1 [patent_app_number] => 8/615662 [patent_app_country] => US [patent_app_date] => 1996-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4912 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/918/05918245.pdf [firstpage_image] =>[orig_patent_app_number] => 615662 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/615662
Microprocessor having a cache memory system using multi-level cache set prediction Mar 12, 1996 Issued
Array ( [id] => 3778090 [patent_doc_number] => 05742934 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-21 [patent_title] => 'Flash solid state disk card with selective use of an address conversion table depending on logical and physical sector numbers' [patent_app_type] => 1 [patent_app_number] => 8/613670 [patent_app_country] => US [patent_app_date] => 1996-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4682 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/742/05742934.pdf [firstpage_image] =>[orig_patent_app_number] => 613670 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/613670
Flash solid state disk card with selective use of an address conversion table depending on logical and physical sector numbers Mar 10, 1996 Issued
Array ( [id] => 3705850 [patent_doc_number] => 05651129 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-22 [patent_title] => 'Modular high-capacity solid-state mass data storage device for video servers including a switch for simultaneous multi-viewer access' [patent_app_type] => 1 [patent_app_number] => 8/611353 [patent_app_country] => US [patent_app_date] => 1996-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1880 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/651/05651129.pdf [firstpage_image] =>[orig_patent_app_number] => 611353 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/611353
Modular high-capacity solid-state mass data storage device for video servers including a switch for simultaneous multi-viewer access Mar 5, 1996 Issued
Array ( [id] => 3634367 [patent_doc_number] => 05689679 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-18 [patent_title] => 'Memory system and method for selective multi-level caching using a cache level code' [patent_app_type] => 1 [patent_app_number] => 8/610901 [patent_app_country] => US [patent_app_date] => 1996-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 10067 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/689/05689679.pdf [firstpage_image] =>[orig_patent_app_number] => 610901 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/610901
Memory system and method for selective multi-level caching using a cache level code Mar 4, 1996 Issued
Array ( [id] => 3765042 [patent_doc_number] => 05802541 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Method and apparatus in a data processing system for using chip selects to perform a memory management function' [patent_app_type] => 1 [patent_app_number] => 8/608388 [patent_app_country] => US [patent_app_date] => 1996-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3807 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/802/05802541.pdf [firstpage_image] =>[orig_patent_app_number] => 608388 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/608388
Method and apparatus in a data processing system for using chip selects to perform a memory management function Feb 27, 1996 Issued
Array ( [id] => 3898114 [patent_doc_number] => 05765196 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'System and method for servicing copyback requests in a multiprocessor system with a shared memory' [patent_app_type] => 1 [patent_app_number] => 8/607364 [patent_app_country] => US [patent_app_date] => 1996-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4872 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/765/05765196.pdf [firstpage_image] =>[orig_patent_app_number] => 607364 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/607364
System and method for servicing copyback requests in a multiprocessor system with a shared memory Feb 26, 1996 Issued
Array ( [id] => 3908400 [patent_doc_number] => 05778440 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Floating gate memory device and method for terminating a program load cycle upon detecting a predetermined address/data pattern' [patent_app_type] => 1 [patent_app_number] => 8/596380 [patent_app_country] => US [patent_app_date] => 1996-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 12044 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/778/05778440.pdf [firstpage_image] =>[orig_patent_app_number] => 596380 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/596380
Floating gate memory device and method for terminating a program load cycle upon detecting a predetermined address/data pattern Feb 15, 1996 Issued
Array ( [id] => 4021946 [patent_doc_number] => 05987569 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Memory control apparatus and method for controlling usage amounts for a plurality of cache memories' [patent_app_type] => 1 [patent_app_number] => 8/601358 [patent_app_country] => US [patent_app_date] => 1996-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4671 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/987/05987569.pdf [firstpage_image] =>[orig_patent_app_number] => 601358 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/601358
Memory control apparatus and method for controlling usage amounts for a plurality of cache memories Feb 15, 1996 Issued
Array ( [id] => 3805643 [patent_doc_number] => 05822757 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Computer system with multi-buffer data cache for prefetching data having different temporal and spatial localities' [patent_app_type] => 1 [patent_app_number] => 8/581670 [patent_app_country] => US [patent_app_date] => 1995-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3079 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/822/05822757.pdf [firstpage_image] =>[orig_patent_app_number] => 581670 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/581670
Computer system with multi-buffer data cache for prefetching data having different temporal and spatial localities Dec 28, 1995 Issued
Array ( [id] => 1395628 [patent_doc_number] => 06567904 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-20 [patent_title] => 'Method and apparatus for automatically detecting whether a memory unit location is unpopulated or populated with synchronous or asynchronous memory devices' [patent_app_type] => B1 [patent_app_number] => 08/581378 [patent_app_country] => US [patent_app_date] => 1995-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6342 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/567/06567904.pdf [firstpage_image] =>[orig_patent_app_number] => 08581378 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/581378
Method and apparatus for automatically detecting whether a memory unit location is unpopulated or populated with synchronous or asynchronous memory devices Dec 28, 1995 Issued
Array ( [id] => 4059774 [patent_doc_number] => 05875477 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-23 [patent_title] => 'Method and apparatus for error management in a solid state disk drive using primary and secondary logical sector numbers' [patent_app_type] => 1 [patent_app_number] => 8/577742 [patent_app_country] => US [patent_app_date] => 1995-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 12110 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/875/05875477.pdf [firstpage_image] =>[orig_patent_app_number] => 577742 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/577742
Method and apparatus for error management in a solid state disk drive using primary and secondary logical sector numbers Dec 21, 1995 Issued
Array ( [id] => 3798017 [patent_doc_number] => 05809522 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Microprocessor system with process identification tag entries to reduce cache flushing after a context switch' [patent_app_type] => 1 [patent_app_number] => 8/573622 [patent_app_country] => US [patent_app_date] => 1995-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5683 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/809/05809522.pdf [firstpage_image] =>[orig_patent_app_number] => 573622 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/573622
Microprocessor system with process identification tag entries to reduce cache flushing after a context switch Dec 17, 1995 Issued
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