Search

Danielle Jackson

Examiner (ID: 13276, Phone: (571)272-2268 , Office: P/3636 )

Most Active Art Unit
3636
Art Unit(s)
3636
Total Applications
1037
Issued Applications
648
Pending Applications
53
Abandoned Applications
355

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4092301 [patent_doc_number] => 05966728 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-12 [patent_title] => 'Computer system and method for snooping date writes to cacheable memory locations in an expansion memory device' [patent_app_type] => 1 [patent_app_number] => 8/490648 [patent_app_country] => US [patent_app_date] => 1995-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 8 [patent_no_of_words] => 7225 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/966/05966728.pdf [firstpage_image] =>[orig_patent_app_number] => 490648 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/490648
Computer system and method for snooping date writes to cacheable memory locations in an expansion memory device Jun 14, 1995 Issued
Array ( [id] => 3806146 [patent_doc_number] => 05737764 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-07 [patent_title] => 'Generation of memory column addresses using memory array type bits in a control register of a computer system' [patent_app_type] => 1 [patent_app_number] => 8/474582 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 37 [patent_no_of_words] => 33827 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/737/05737764.pdf [firstpage_image] =>[orig_patent_app_number] => 474582 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/474582
Generation of memory column addresses using memory array type bits in a control register of a computer system Jun 6, 1995 Issued
08/482056 MEMORY CONTROL CIRCUITS, SYSTEMS AND METHODS Jun 6, 1995 Abandoned
Array ( [id] => 3897438 [patent_doc_number] => 05805854 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'System and process for memory column address organization in a computer system' [patent_app_type] => 1 [patent_app_number] => 8/482057 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 37 [patent_no_of_words] => 33538 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/805/05805854.pdf [firstpage_image] =>[orig_patent_app_number] => 482057 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/482057
System and process for memory column address organization in a computer system Jun 6, 1995 Issued
Array ( [id] => 3673052 [patent_doc_number] => 05649142 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-15 [patent_title] => 'Method and apparatus for translating addresses using mask and replacement value registers and for accessing a service routine in response to a page fault' [patent_app_type] => 1 [patent_app_number] => 8/476061 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 10688 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/649/05649142.pdf [firstpage_image] =>[orig_patent_app_number] => 476061 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/476061
Method and apparatus for translating addresses using mask and replacement value registers and for accessing a service routine in response to a page fault Jun 6, 1995 Issued
Array ( [id] => 3908169 [patent_doc_number] => 05778425 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Electronic system having a first level write through cache memory and smaller second-level write-back cache memory and method of operating the same' [patent_app_type] => 1 [patent_app_number] => 8/484420 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 37 [patent_no_of_words] => 33859 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/778/05778425.pdf [firstpage_image] =>[orig_patent_app_number] => 484420 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/484420
Electronic system having a first level write through cache memory and smaller second-level write-back cache memory and method of operating the same Jun 6, 1995 Issued
Array ( [id] => 3902792 [patent_doc_number] => 05724553 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-03 [patent_title] => 'Electronic system with circuitry for generating memory column addresses using memory array type bits in a control register' [patent_app_type] => 1 [patent_app_number] => 8/474850 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 37 [patent_no_of_words] => 33550 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/724/05724553.pdf [firstpage_image] =>[orig_patent_app_number] => 474850 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/474850
Electronic system with circuitry for generating memory column addresses using memory array type bits in a control register Jun 6, 1995 Issued
Array ( [id] => 3844232 [patent_doc_number] => 05713006 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-27 [patent_title] => 'Electronic device and method for selective enabling of access to configuration registers used by a memory controller' [patent_app_type] => 1 [patent_app_number] => 8/478163 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 37 [patent_no_of_words] => 33561 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/713/05713006.pdf [firstpage_image] =>[orig_patent_app_number] => 478163 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/478163
Electronic device and method for selective enabling of access to configuration registers used by a memory controller Jun 6, 1995 Issued
Array ( [id] => 3806161 [patent_doc_number] => 05737765 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-07 [patent_title] => 'Electronic system with circuitry for selectively enabling access to configuration registers used by a memory controller' [patent_app_type] => 1 [patent_app_number] => 8/488350 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 37 [patent_no_of_words] => 33844 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/737/05737765.pdf [firstpage_image] =>[orig_patent_app_number] => 488350 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/488350
Electronic system with circuitry for selectively enabling access to configuration registers used by a memory controller Jun 6, 1995 Issued
Array ( [id] => 3802984 [patent_doc_number] => 05737563 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-07 [patent_title] => 'Determination of memory bank sizes in a computer system' [patent_app_type] => 1 [patent_app_number] => 8/472623 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 37 [patent_no_of_words] => 33542 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/737/05737563.pdf [firstpage_image] =>[orig_patent_app_number] => 472623 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/472623
Determination of memory bank sizes in a computer system Jun 6, 1995 Issued
Array ( [id] => 3603762 [patent_doc_number] => 05586299 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-17 [patent_title] => 'Systems and methods for accessing multi-port memories' [patent_app_type] => 1 [patent_app_number] => 8/473035 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 7226 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/586/05586299.pdf [firstpage_image] =>[orig_patent_app_number] => 473035 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/473035
Systems and methods for accessing multi-port memories Jun 5, 1995 Issued
Array ( [id] => 3660300 [patent_doc_number] => 05640528 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-17 [patent_title] => 'Method and apparatus for translating addresses using mask and replacement value registers' [patent_app_type] => 1 [patent_app_number] => 8/469798 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 10644 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/640/05640528.pdf [firstpage_image] =>[orig_patent_app_number] => 469798 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/469798
Method and apparatus for translating addresses using mask and replacement value registers Jun 5, 1995 Issued
Array ( [id] => 3532232 [patent_doc_number] => 05530833 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-25 [patent_title] => 'Apparatus and method for updating LRU pointer in a controller for two-way set associative cache' [patent_app_type] => 1 [patent_app_number] => 8/486132 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4335 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/530/05530833.pdf [firstpage_image] =>[orig_patent_app_number] => 486132 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/486132
Apparatus and method for updating LRU pointer in a controller for two-way set associative cache Jun 5, 1995 Issued
Array ( [id] => 4333294 [patent_doc_number] => 06332185 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-18 [patent_title] => 'Method and apparatus for paging data and attributes including an atomic attribute for digital data processor' [patent_app_type] => 1 [patent_app_number] => 8/461174 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 13409 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/332/06332185.pdf [firstpage_image] =>[orig_patent_app_number] => 461174 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/461174
Method and apparatus for paging data and attributes including an atomic attribute for digital data processor Jun 4, 1995 Issued
Array ( [id] => 4238818 [patent_doc_number] => 06088758 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Method and apparatus for distributing data in a digital data processor with distributed memory' [patent_app_type] => 1 [patent_app_number] => 8/461167 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 13936 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/088/06088758.pdf [firstpage_image] =>[orig_patent_app_number] => 461167 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/461167
Method and apparatus for distributing data in a digital data processor with distributed memory Jun 4, 1995 Issued
08/460188 SYSTEM AND METHOD USING A MEMORY BUS FOR HIGH-SPEED AND FLEXIBLE DATA TRANSFERS Jun 1, 1995 Abandoned
Array ( [id] => 3569684 [patent_doc_number] => 05544341 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-06 [patent_title] => 'Data access apparatus for preventing further cache access in case of an error during block data transfer' [patent_app_type] => 1 [patent_app_number] => 8/454893 [patent_app_country] => US [patent_app_date] => 1995-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6018 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/544/05544341.pdf [firstpage_image] =>[orig_patent_app_number] => 454893 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/454893
Data access apparatus for preventing further cache access in case of an error during block data transfer May 30, 1995 Issued
Array ( [id] => 3558810 [patent_doc_number] => 05555560 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-10 [patent_title] => 'Request cancel system for cancelling a second access request having the same address as a first access request' [patent_app_type] => 1 [patent_app_number] => 8/452576 [patent_app_country] => US [patent_app_date] => 1995-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 27 [patent_no_of_words] => 4353 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/555/05555560.pdf [firstpage_image] =>[orig_patent_app_number] => 452576 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/452576
Request cancel system for cancelling a second access request having the same address as a first access request May 24, 1995 Issued
Array ( [id] => 3666077 [patent_doc_number] => 05659459 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-19 [patent_title] => 'Cartridge for electronic devices including grounding pads and conductive shielding to decrease the wavelength of emitted electromagnetic radiation' [patent_app_type] => 1 [patent_app_number] => 8/439633 [patent_app_country] => US [patent_app_date] => 1995-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 39 [patent_no_of_words] => 20891 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/659/05659459.pdf [firstpage_image] =>[orig_patent_app_number] => 439633 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/439633
Cartridge for electronic devices including grounding pads and conductive shielding to decrease the wavelength of emitted electromagnetic radiation May 11, 1995 Issued
Array ( [id] => 3595656 [patent_doc_number] => 05581724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-03 [patent_title] => 'Dynamically mapped data storage subsystem having multiple open destage cylinders and method of managing that subsystem' [patent_app_type] => 1 [patent_app_number] => 8/439665 [patent_app_country] => US [patent_app_date] => 1995-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 13004 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/581/05581724.pdf [firstpage_image] =>[orig_patent_app_number] => 439665 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/439665
Dynamically mapped data storage subsystem having multiple open destage cylinders and method of managing that subsystem May 11, 1995 Issued
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