| Application number | Title of the application | Filing Date | Status |
|---|
| 07/821874 | SEMICONDUCTOR MEMORY INCLUDING A HYSTERESIS CIRCUIT HAVING OUTPUT DELAY TIME DEPENDENT ON CHANGE IN INPUT SIGNAL AND POWER DOWN CIRCUITRY | Jan 14, 1992 | Abandoned |
| 07/820830 | BLOCK ARCHITECTED STATIC RAM CONFIGURABLE FOR DIFFERENT WORD WIDTHS AND ASSOCIATED METHOD FOR FORMING | Jan 14, 1992 | Abandoned |
Array
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[id] => 2911643
[patent_doc_number] => 05218571
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-06-08
[patent_title] => 'EPROM source bias circuit with compensation for processing characteristics'
[patent_app_type] => 1
[patent_app_number] => 7/819606
[patent_app_country] => US
[patent_app_date] => 1992-01-09
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[firstpage_image] =>[orig_patent_app_number] => 819606
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/819606 | EPROM source bias circuit with compensation for processing characteristics | Jan 8, 1992 | Issued |
| 07/818279 | DATA STORAGE SYSTEM INCLUDING A BIOS EXTENSION MEMORY ON AN ADAPTER BETWEEN A HOST COMPUTER AND DISK DRIVE | Jan 7, 1992 | Abandoned |
Array
(
[id] => 3015689
[patent_doc_number] => 05371869
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-12-06
[patent_title] => 'Micro-controller unit for selectively accessing an internal memory or an external extended memory using a read/write terminal'
[patent_app_type] => 1
[patent_app_number] => 7/816822
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/816822 | Micro-controller unit for selectively accessing an internal memory or an external extended memory using a read/write terminal | Jan 2, 1992 | Issued |
| 07/815992 | A SYSTEM HAVING A BUS INTERFACE UNIT FOR DYNAMICALLY OPTIMIZING DATA TRANSFERS BETWEEN A FIRST BUS AND A SECOND BUS | Jan 1, 1992 | Abandoned |
Array
(
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[patent_doc_number] => 05367639
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-22
[patent_title] => 'Method and apparatus for dynamic chaining of DMA operations without incurring race conditions'
[patent_app_type] => 1
[patent_app_number] => 7/815802
[patent_app_country] => US
[patent_app_date] => 1991-12-30
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Array
(
[id] => 3007444
[patent_doc_number] => 05367655
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-22
[patent_title] => 'Memory and associated method including an operating mode for simultaneously selecting multiple rows of cells'
[patent_app_type] => 1
[patent_app_number] => 7/812492
[patent_app_country] => US
[patent_app_date] => 1991-12-23
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Array
(
[id] => 3041762
[patent_doc_number] => 05317712
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-31
[patent_title] => 'Method and apparatus for testing and configuring the width of portions of a memory'
[patent_app_type] => 1
[patent_app_number] => 7/812072
[patent_app_country] => US
[patent_app_date] => 1991-12-19
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Array
(
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[patent_doc_number] => 05228132
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-07-13
[patent_title] => 'Memory module arranged for data and parity bits'
[patent_app_type] => 1
[patent_app_number] => 7/800773
[patent_app_country] => US
[patent_app_date] => 1991-11-27
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[firstpage_image] =>[orig_patent_app_number] => 800773
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/800773 | Memory module arranged for data and parity bits | Nov 26, 1991 | Issued |
| 07/795268 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE | Nov 19, 1991 | Abandoned |
| 07/794035 | HIGH SPEED SEMICONDUCTOR MEMORY DEVICE HAVING A HIGH GAIN SENSE AMPLIFIER | Nov 18, 1991 | Abandoned |
Array
(
[id] => 3103719
[patent_doc_number] => 05313432
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-17
[patent_title] => 'Segmented, multiple-decoder memory array and method for programming a memory array'
[patent_app_type] => 1
[patent_app_number] => 7/790122
[patent_app_country] => US
[patent_app_date] => 1991-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[firstpage_image] =>[orig_patent_app_number] => 790122
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Array
(
[id] => 3465247
[patent_doc_number] => 05379397
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-03
[patent_title] => 'Disk storage control device including a sector number register and range detection circuitry for reading and writing to a range of detectors'
[patent_app_type] => 1
[patent_app_number] => 7/790388
[patent_app_country] => US
[patent_app_date] => 1991-11-12
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| 07/787706 | NONVOLATILE MEMORY ARRAY WORDLINE DRIVER CIRCUIT WITH VOLTAGE TRANSLATOR CIRCUIT AND METHOD FOR PROGRAMMING | Nov 3, 1991 | Abandoned |
| 07/782719 | SEMICONDUCTOR MEMORY DEVICE CAPABLE OF MULTIDIRECTION DATA ACCESS | Oct 27, 1991 | Abandoned |
| 07/783028 | SEMICONDUCTOR MEMORY DEVICE WITH A LARGE STORAGE CAPACITY MEMORY AND A FAST SPEED MEMORY | Oct 24, 1991 | Abandoned |
Array
(
[id] => 3460149
[patent_doc_number] => 05386526
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-31
[patent_title] => 'Cache memory controller and method for reducing CPU idle time by fetching data during a cache fill'
[patent_app_type] => 1
[patent_app_number] => 7/779388
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/779388 | Cache memory controller and method for reducing CPU idle time by fetching data during a cache fill | Oct 17, 1991 | Issued |
Array
(
[id] => 3133797
[patent_doc_number] => 05381538
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-10
[patent_title] => 'DMA controller including a FIFO register and a residual register for data buffering and having different operating modes'
[patent_app_type] => 1
[patent_app_number] => 7/778042
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/778042 | DMA controller including a FIFO register and a residual register for data buffering and having different operating modes | Oct 14, 1991 | Issued |
| 07/774121 | MEMORY MODULE HAVING ON-CHIP SURGE CAPACITORS | Oct 7, 1991 | Abandoned |
