| Application number | Title of the application | Filing Date | Status |
|---|
| 07/438713 | FLOATING GATE SEMICONDUCTOR NONVOLATILE MEMORY HAVING IMPURITY DOPED REGIONS FOR LOW VOLTAGE OPERATION | Nov 16, 1989 | Abandoned |
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[patent_issue_date] => 1993-10-12
[patent_title] => 'Method and apparatus for pipelining cache accesses using anticipatory initiation of cache read'
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| 07/435152 | METHOD AND APPARATUS FOR READING WRITE-ONLY OUTPUT PORTS | Nov 12, 1989 | Abandoned |
| 07/433013 | DYNAMIC SEMICONDUCTOR MEMORY DEVICE HAVING AN IMPROVED SENSE AMPLIFIER LAYOUT ARRANGEMENT | Nov 6, 1989 | Abandoned |
| 07/430983 | SYSTEM FOR RECORDING/REPRODUCING CHARGE LATENT IMAGE | Nov 2, 1989 | Abandoned |
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[patent_doc_number] => 05051959
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[patent_issue_date] => 1991-09-24
[patent_title] => 'Complementary semiconductor memory device including cell access transistor and word line driving transistor having channels of different conductivity type'
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[patent_app_number] => 7/430968
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| 07/430915 | BIT LINE STRUCTURE FOR SEMICONDUCTOR MEMORY DEVICE | Oct 30, 1989 | Abandoned |
| 07/424712 | MEMORY SYSTEM EMPLOYING EXTENDED MEMORY CAPACITY DETECTION CIRCUIT | Oct 19, 1989 | Abandoned |
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[patent_issue_date] => 1991-09-17
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[patent_app_number] => 7/417338
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Array
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[patent_issue_date] => 1992-02-18
[patent_title] => 'Memory module arranged for data and parity bits'
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[patent_app_number] => 7/415074
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Array
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[id] => 2753340
[patent_doc_number] => 05029128
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-02
[patent_title] => 'Semiconductor memory device with ferroelectric capacitor cells with a plate to which a mid-level voltage is applied'
[patent_app_type] => 1
[patent_app_number] => 7/412123
[patent_app_country] => US
[patent_app_date] => 1989-09-25
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| 07/411266 | SEMICONDUCTOR NONVOLATILE MEMORY DEVICE | Sep 24, 1989 | Abandoned |
Array
(
[id] => 2605369
[patent_doc_number] => 04975878
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[patent_kind] => NA
[patent_issue_date] => 1990-12-04
[patent_title] => 'Programmable memory data protection scheme'
[patent_app_type] => 1
[patent_app_number] => 7/409958
[patent_app_country] => US
[patent_app_date] => 1989-09-18
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/409958 | Programmable memory data protection scheme | Sep 17, 1989 | Issued |
| 07/408013 | SEMICONDCUTOR MEMORY DEVICE HAVING FLASH WRITE FUNCTION | Sep 14, 1989 | Abandoned |
Array
(
[id] => 2857829
[patent_doc_number] => 05107465
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-04-21
[patent_title] => 'Asynchronous/synchronous pipeline dual mode memory access circuit and method'
[patent_app_type] => 1
[patent_app_number] => 7/407403
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[patent_app_date] => 1989-09-13
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| 07/406798 | HIGH CAPACITY DATA STORAGE METHOD AND SYSTEM USING PLURAL HEADS AND CIRCUITRY FOR MONITORING FREQUENTLY ACCESSED DATA RECORDS | Sep 12, 1989 | Abandoned |
| 07/405800 | APPARATUS AND METHOD FOR MAINTAINING CACHE/MAIN MEMORY CONSISTENCY FOR WRITE OPERATIONS OF LESS THAN A WORD IN WIDTH | Sep 10, 1989 | Abandoned |
