Danielle Jackson

Array ( [id] => 2843036 [patent_doc_number] => 05175837 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-29 [patent_title] => 'Synchronizing and processing of memory access operations in multiprocessor systems using a directory of lock bits' [patent_app_type] => 1 [patent_app_number] => 7/306541 [patent_app_country] => US [patent_app_date] => 1989-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6764 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 343 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/175/05175837.pdf [firstpage_image] =>[orig_patent_app_number] => 306541 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2925281 [patent_doc_number] => 05237670 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-17 [patent_title] => 'Method and apparatus for data transfer between source and destination modules' [patent_app_type] => 1 [patent_app_number] => 7/304053 [patent_app_country] => US [patent_app_date] => 1989-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 7233 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/237/05237670.pdf [firstpage_image] =>[orig_patent_app_number] => 304053 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2776420 [patent_doc_number] => 05036491 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-30 [patent_title] => 'Multiport semiconductor memory including an address comparator' [patent_app_type] => 1 [patent_app_number] => 7/291453 [patent_app_country] => US [patent_app_date] => 1988-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4292 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/036/05036491.pdf [firstpage_image] =>[orig_patent_app_number] => 291453 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2785708 [patent_doc_number] => 05132929 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-21 [patent_title] => 'Static RAM including leakage current detector' [patent_app_type] => 1 [patent_app_number] => 7/288183 [patent_app_country] => US [patent_app_date] => 1988-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5681 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/132/05132929.pdf [firstpage_image] =>[orig_patent_app_number] => 288183 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2605277 [patent_doc_number] => 04975873 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-04 [patent_title] => 'Content addressable memory with flag storage to indicate memory state' [patent_app_type] => 1 [patent_app_number] => 7/283293 [patent_app_country] => US [patent_app_date] => 1988-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 5733 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 334 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/975/04975873.pdf [firstpage_image] =>[orig_patent_app_number] => 283293 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2755552 [patent_doc_number] => 05012443 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-30 [patent_title] => 'Semiconductor static ram including load resistors formed on different layers' [patent_app_type] => 1 [patent_app_number] => 7/280473 [patent_app_country] => US [patent_app_date] => 1988-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 5335 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/012/05012443.pdf [firstpage_image] =>[orig_patent_app_number] => 280473 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2735064 [patent_doc_number] => 05058075 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-15 [patent_title] => 'Battery circuit for an integrated circuit (IC) memory card' [patent_app_type] => 1 [patent_app_number] => 7/280423 [patent_app_country] => US [patent_app_date] => 1988-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3001 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/058/05058075.pdf [firstpage_image] =>[orig_patent_app_number] => 280423 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2679993 [patent_doc_number] => 05047988 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-10 [patent_title] => 'Disposable IC memory card having an embedded battery' [patent_app_type] => 1 [patent_app_number] => 7/279723 [patent_app_country] => US [patent_app_date] => 1988-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3341 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/047/05047988.pdf [firstpage_image] =>[orig_patent_app_number] => 279723 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2716906 [patent_doc_number] => 05014243 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-07 [patent_title] => 'Programmable read only memory (PROM) having circular shaped emitter regions' [patent_app_type] => 1 [patent_app_number] => 7/276913 [patent_app_country] => US [patent_app_date] => 1988-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3185 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/014/05014243.pdf [firstpage_image] =>[orig_patent_app_number] => 276913 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2783793 [patent_doc_number] => 05075891 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-24 [patent_title] => 'Memory with a variable impedance bit line load circuit' [patent_app_type] => 1 [patent_app_number] => 7/276683 [patent_app_country] => US [patent_app_date] => 1988-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3859 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 415 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/075/05075891.pdf [firstpage_image] =>[orig_patent_app_number] => 276683 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2568192 [patent_doc_number] => 04853899 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-08-01 [patent_title] => 'Semiconductor memory having amplifier including bipolar transistor' [patent_app_type] => 1 [patent_app_number] => 7/276947 [patent_app_country] => US [patent_app_date] => 1988-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 4643 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 559 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/853/04853899.pdf [firstpage_image] =>[orig_patent_app_number] => 276947 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2589428 [patent_doc_number] => 04974203 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-27 [patent_title] => 'Arrangement and construction of an output control circuit in a semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/274594 [patent_app_country] => US [patent_app_date] => 1988-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3938 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/974/04974203.pdf [firstpage_image] =>[orig_patent_app_number] => 274594 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2698347 [patent_doc_number] => 05050125 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-17 [patent_title] => 'Electrically erasable programmable read-only memory with NAND cellstructure' [patent_app_type] => 1 [patent_app_number] => 7/272404 [patent_app_country] => US [patent_app_date] => 1988-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 7166 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 355 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/050/05050125.pdf [firstpage_image] =>[orig_patent_app_number] => 272404 [rel_patent_id] =>[rel_patent_doc_number] =>)