| Application number | Title of the application | Filing Date | Status |
|---|
| 06/880964 | SEMICONDUCTOR MEMORY IN WHICH DATA READOUT OPERATION IS CARRIED OUT OVER WIDE POWER VOLTAGE RANGE | Jun 30, 1986 | Abandoned |
Array
(
[id] => 2465534
[patent_doc_number] => 04785424
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-11-15
[patent_title] => 'Apparatus for page mode programming of an EEPROM cell array with false loading protection'
[patent_app_type] => 1
[patent_app_number] => 6/868114
[patent_app_country] => US
[patent_app_date] => 1986-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 6408
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/785/04785424.pdf
[firstpage_image] =>[orig_patent_app_number] => 868114
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/868114 | Apparatus for page mode programming of an EEPROM cell array with false loading protection | May 26, 1986 | Issued |
Array
(
[id] => 2451503
[patent_doc_number] => 04779234
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-10-18
[patent_title] => 'First-in-first-out memory capable of simultaneous readings and writing operations'
[patent_app_type] => 1
[patent_app_number] => 6/866963
[patent_app_country] => US
[patent_app_date] => 1986-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3107
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 307
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/779/04779234.pdf
[firstpage_image] =>[orig_patent_app_number] => 866963
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/866963 | First-in-first-out memory capable of simultaneous readings and writing operations | May 26, 1986 | Issued |
| 06/862943 | PROGRAMMABLE MEMORY CELL STRUCTURE AND MANUFACTURING METHOD | May 13, 1986 | Abandoned |
Array
(
[id] => 2565257
[patent_doc_number] => 04815036
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-03-21
[patent_title] => 'Programmable logic array having an on/off sense function'
[patent_app_type] => 1
[patent_app_number] => 6/859469
[patent_app_country] => US
[patent_app_date] => 1986-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3082
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/815/04815036.pdf
[firstpage_image] =>[orig_patent_app_number] => 859469
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/859469 | Programmable logic array having an on/off sense function | May 4, 1986 | Issued |
Array
(
[id] => 2388686
[patent_doc_number] => 04752913
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-06-21
[patent_title] => 'Random access memory employing complementary transistor switch (CTS) memory cells'
[patent_app_type] => 1
[patent_app_number] => 6/857903
[patent_app_country] => US
[patent_app_date] => 1986-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 15
[patent_no_of_words] => 7883
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 585
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/752/04752913.pdf
[firstpage_image] =>[orig_patent_app_number] => 857903
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/857903 | Random access memory employing complementary transistor switch (CTS) memory cells | Apr 29, 1986 | Issued |
Array
(
[id] => 2425082
[patent_doc_number] => 04771405
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-09-13
[patent_title] => 'Hidden control bits in a control register'
[patent_app_type] => 1
[patent_app_number] => 6/851993
[patent_app_country] => US
[patent_app_date] => 1986-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 1469
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/771/04771405.pdf
[firstpage_image] =>[orig_patent_app_number] => 851993
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/851993 | Hidden control bits in a control register | Apr 13, 1986 | Issued |
Array
(
[id] => 2485983
[patent_doc_number] => 04813014
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-03-14
[patent_title] => 'Digital audio memory system'
[patent_app_type] => 1
[patent_app_number] => 6/851453
[patent_app_country] => US
[patent_app_date] => 1986-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6331
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/813/04813014.pdf
[firstpage_image] =>[orig_patent_app_number] => 851453
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/851453 | Digital audio memory system | Apr 13, 1986 | Issued |
Array
(
[id] => 2565239
[patent_doc_number] => 04815035
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-03-21
[patent_title] => 'Scrolling liquid crystal spatial light modulator'
[patent_app_type] => 1
[patent_app_number] => 6/892664
[patent_app_country] => US
[patent_app_date] => 1986-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 13
[patent_no_of_words] => 4680
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/815/04815035.pdf
[firstpage_image] =>[orig_patent_app_number] => 892664
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/892664 | Scrolling liquid crystal spatial light modulator | Apr 7, 1986 | Issued |
Array
(
[id] => 2639910
[patent_doc_number] => 04899066
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-02-06
[patent_title] => 'OR-type CMOS logic circuit with fast precharging'
[patent_app_type] => 1
[patent_app_number] => 6/848563
[patent_app_country] => US
[patent_app_date] => 1986-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2714
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 228
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/899/04899066.pdf
[firstpage_image] =>[orig_patent_app_number] => 848563
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/848563 | OR-type CMOS logic circuit with fast precharging | Apr 6, 1986 | Issued |
Array
(
[id] => 2390402
[patent_doc_number] => 04730273
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-03-08
[patent_title] => 'On-chip programmability verification circuit for programmable read only memory having lateral fuses'
[patent_app_type] => 1
[patent_app_number] => 6/847974
[patent_app_country] => US
[patent_app_date] => 1986-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2941
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/730/04730273.pdf
[firstpage_image] =>[orig_patent_app_number] => 847974
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/847974 | On-chip programmability verification circuit for programmable read only memory having lateral fuses | Apr 2, 1986 | Issued |
Array
(
[id] => 2343244
[patent_doc_number] => 04677590
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-06-30
[patent_title] => 'Nonvolatile semiconductor memory circuit including dummy sense amplifiers'
[patent_app_type] => 1
[patent_app_number] => 6/844257
[patent_app_country] => US
[patent_app_date] => 1986-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 2861
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/677/04677590.pdf
[firstpage_image] =>[orig_patent_app_number] => 844257
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/844257 | Nonvolatile semiconductor memory circuit including dummy sense amplifiers | Mar 23, 1986 | Issued |
Array
(
[id] => 2643369
[patent_doc_number] => 04893273
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-01-09
[patent_title] => 'Semiconductor memory device for storing image data'
[patent_app_type] => 1
[patent_app_number] => 6/842193
[patent_app_country] => US
[patent_app_date] => 1986-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 13
[patent_no_of_words] => 4217
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 341
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/893/04893273.pdf
[firstpage_image] =>[orig_patent_app_number] => 842193
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/842193 | Semiconductor memory device for storing image data | Mar 20, 1986 | Issued |
| 06/840784 | SEMICONDUCTOR MEMORY HAVING MEANS FOR DISCHARGING DIGIT LINE BEFORE VERIFYING OPERATION | Mar 17, 1986 | Abandoned |
| 06/839844 | SEMICONDUCTOR ROW WITH REDUCED SUPPLY VOLTAGE REQUIREMENT | Mar 12, 1986 | Abandoned |
Array
(
[id] => 2459939
[patent_doc_number] => 04733369
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-03-22
[patent_title] => 'Method for providing separately adjustable voltage dependent optical properties'
[patent_app_type] => 1
[patent_app_number] => 6/822142
[patent_app_country] => US
[patent_app_date] => 1986-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 3312
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 221
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/733/04733369.pdf
[firstpage_image] =>[orig_patent_app_number] => 822142
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/822142 | Method for providing separately adjustable voltage dependent optical properties | Jan 23, 1986 | Issued |
Array
(
[id] => 2539493
[patent_doc_number] => 04839860
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-06-13
[patent_title] => 'Semiconductor device having head only memory with differential amplifier'
[patent_app_type] => 1
[patent_app_number] => 6/820523
[patent_app_country] => US
[patent_app_date] => 1986-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 21
[patent_no_of_words] => 24956
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 656
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/839/04839860.pdf
[firstpage_image] =>[orig_patent_app_number] => 820523
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/820523 | Semiconductor device having head only memory with differential amplifier | Jan 16, 1986 | Issued |
| 06/814473 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING WRITE CIRCUIT INCLUDING SERIAL SWITCHING ELEMENTS | Dec 29, 1985 | Abandoned |
Array
(
[id] => 2461822
[patent_doc_number] => 04766572
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-08-23
[patent_title] => 'Semiconductor memory having a bypassable data output latch'
[patent_app_type] => 1
[patent_app_number] => 6/813604
[patent_app_country] => US
[patent_app_date] => 1985-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 18
[patent_no_of_words] => 5916
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/766/04766572.pdf
[firstpage_image] =>[orig_patent_app_number] => 813604
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/813604 | Semiconductor memory having a bypassable data output latch | Dec 25, 1985 | Issued |
Array
(
[id] => 2464552
[patent_doc_number] => 04718042
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-01-05
[patent_title] => 'Non-destructive method and circuit to determine the programmability of a one time programmable device'
[patent_app_type] => 1
[patent_app_number] => 6/811983
[patent_app_country] => US
[patent_app_date] => 1985-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2961
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/718/04718042.pdf
[firstpage_image] =>[orig_patent_app_number] => 811983
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/811983 | Non-destructive method and circuit to determine the programmability of a one time programmable device | Dec 22, 1985 | Issued |