Search

Danielle Jackson

Examiner (ID: 13276, Phone: (571)272-2268 , Office: P/3636 )

Most Active Art Unit
3636
Art Unit(s)
3636
Total Applications
1037
Issued Applications
648
Pending Applications
53
Abandoned Applications
355

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2428014 [patent_doc_number] => 04727517 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-02-23 [patent_title] => 'Semiconductor memory with column line voltage sitting circuit' [patent_app_type] => 1 [patent_app_number] => 6/785654 [patent_app_country] => US [patent_app_date] => 1985-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 25 [patent_no_of_words] => 11276 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/727/04727517.pdf [firstpage_image] =>[orig_patent_app_number] => 785654 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/785654
Semiconductor memory with column line voltage sitting circuit Oct 8, 1985 Issued
Array ( [id] => 2309069 [patent_doc_number] => 04685083 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-08-04 [patent_title] => 'Improved nonvolatile memory circuit using a dual node floating gate memory cell' [patent_app_type] => 1 [patent_app_number] => 6/783493 [patent_app_country] => US [patent_app_date] => 1985-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4941 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/685/04685083.pdf [firstpage_image] =>[orig_patent_app_number] => 783493 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/783493
Improved nonvolatile memory circuit using a dual node floating gate memory cell Oct 2, 1985 Issued
Array ( [id] => 2365042 [patent_doc_number] => 04694431 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-15 [patent_title] => 'Semiconductor memory device with increased adaptability' [patent_app_type] => 1 [patent_app_number] => 6/779013 [patent_app_country] => US [patent_app_date] => 1985-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 3351 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/694/04694431.pdf [firstpage_image] =>[orig_patent_app_number] => 779013 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/779013
Semiconductor memory device with increased adaptability Sep 22, 1985 Issued
Array ( [id] => 2421846 [patent_doc_number] => 04719594 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-01-12 [patent_title] => 'Grooved optical data storage device including a chalcogenide memory layer' [patent_app_type] => 1 [patent_app_number] => 6/769227 [patent_app_country] => US [patent_app_date] => 1985-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6366 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 338 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/719/04719594.pdf [firstpage_image] =>[orig_patent_app_number] => 769227 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/769227
Grooved optical data storage device including a chalcogenide memory layer Aug 25, 1985 Issued
06/767404 DEFECTIVE ELEMENT DISABLING CIRCUIT HAVING A LASER-BLOWN FUSE Aug 19, 1985 Abandoned
Array ( [id] => 2298486 [patent_doc_number] => 04710901 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-12-01 [patent_title] => 'Driving circuit for a shared sense amplifier' [patent_app_type] => 1 [patent_app_number] => 6/767193 [patent_app_country] => US [patent_app_date] => 1985-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 9271 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/710/04710901.pdf [firstpage_image] =>[orig_patent_app_number] => 767193 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/767193
Driving circuit for a shared sense amplifier Aug 18, 1985 Issued
Array ( [id] => 2436683 [patent_doc_number] => 04750839 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-06-14 [patent_title] => 'Semiconductor memory with static column decode and page mode addressing capability' [patent_app_type] => 1 [patent_app_number] => 6/763483 [patent_app_country] => US [patent_app_date] => 1985-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 4145 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/750/04750839.pdf [firstpage_image] =>[orig_patent_app_number] => 763483 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/763483
Semiconductor memory with static column decode and page mode addressing capability Aug 6, 1985 Issued
Array ( [id] => 2565148 [patent_doc_number] => 04809229 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-02-28 [patent_title] => 'Data processing integrated circuit with improved decoder arrangement' [patent_app_type] => 1 [patent_app_number] => 6/763189 [patent_app_country] => US [patent_app_date] => 1985-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3271 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/809/04809229.pdf [firstpage_image] =>[orig_patent_app_number] => 763189 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/763189
Data processing integrated circuit with improved decoder arrangement Aug 6, 1985 Issued
Array ( [id] => 2246150 [patent_doc_number] => 04608668 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-08-26 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 6/763088 [patent_app_country] => US [patent_app_date] => 1985-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 3648 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/608/04608668.pdf [firstpage_image] =>[orig_patent_app_number] => 763088 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/763088
Semiconductor device Aug 5, 1985 Issued
Array ( [id] => 2365038 [patent_doc_number] => 04694427 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-15 [patent_title] => 'Programmable semiconductor memory device with combined sense amplification and programming capability' [patent_app_type] => 1 [patent_app_number] => 6/759433 [patent_app_country] => US [patent_app_date] => 1985-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4483 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 454 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/694/04694427.pdf [firstpage_image] =>[orig_patent_app_number] => 759433 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/759433
Programmable semiconductor memory device with combined sense amplification and programming capability Jul 25, 1985 Issued
Array ( [id] => 2458435 [patent_doc_number] => 04758991 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-07-19 [patent_title] => 'Rewritable semiconductor memory device having a decoding inhibit function' [patent_app_type] => 1 [patent_app_number] => 6/758953 [patent_app_country] => US [patent_app_date] => 1985-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3010 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/758/04758991.pdf [firstpage_image] =>[orig_patent_app_number] => 758953 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/758953
Rewritable semiconductor memory device having a decoding inhibit function Jul 24, 1985 Issued
Array ( [id] => 2393074 [patent_doc_number] => 04707809 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-11-17 [patent_title] => 'Semiconductor memory device with shortened time period of word line selection' [patent_app_type] => 1 [patent_app_number] => 6/754103 [patent_app_country] => US [patent_app_date] => 1985-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 5795 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/707/04707809.pdf [firstpage_image] =>[orig_patent_app_number] => 754103 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/754103
Semiconductor memory device with shortened time period of word line selection Jul 11, 1985 Issued
Array ( [id] => 2332970 [patent_doc_number] => 04698790 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-10-06 [patent_title] => 'Programmable read only memory adaptive row driver circuit' [patent_app_type] => 1 [patent_app_number] => 6/753083 [patent_app_country] => US [patent_app_date] => 1985-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8828 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/698/04698790.pdf [firstpage_image] =>[orig_patent_app_number] => 753083 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/753083
Programmable read only memory adaptive row driver circuit Jul 8, 1985 Issued
Array ( [id] => 2335243 [patent_doc_number] => 04672576 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-06-09 [patent_title] => 'Programmable read only memory output circuit' [patent_app_type] => 1 [patent_app_number] => 6/753084 [patent_app_country] => US [patent_app_date] => 1985-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8582 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/672/04672576.pdf [firstpage_image] =>[orig_patent_app_number] => 753084 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/753084
Programmable read only memory output circuit Jul 8, 1985 Issued
Array ( [id] => 2430893 [patent_doc_number] => 04780846 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-10-25 [patent_title] => 'Master slice type semiconductor circuit device' [patent_app_type] => 1 [patent_app_number] => 6/750163 [patent_app_country] => US [patent_app_date] => 1985-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 5126 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/780/04780846.pdf [firstpage_image] =>[orig_patent_app_number] => 750163 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/750163
Master slice type semiconductor circuit device Jun 27, 1985 Issued
Array ( [id] => 2561893 [patent_doc_number] => 04833655 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-23 [patent_title] => 'FIFO memory with decreased fall-through delay' [patent_app_type] => 1 [patent_app_number] => 6/750723 [patent_app_country] => US [patent_app_date] => 1985-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5688 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/833/04833655.pdf [firstpage_image] =>[orig_patent_app_number] => 750723 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/750723
FIFO memory with decreased fall-through delay Jun 27, 1985 Issued
06/745424 MEMORY DEVICE WITH IMPROVED COMMON DATA LINE BIAS ARRANGEMENT Jun 16, 1985 Abandoned
Array ( [id] => 2298450 [patent_doc_number] => 04710899 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-12-01 [patent_title] => 'Data storage medium incorporating a transition metal for increased switching speed' [patent_app_type] => 1 [patent_app_number] => 6/742813 [patent_app_country] => US [patent_app_date] => 1985-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4948 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/710/04710899.pdf [firstpage_image] =>[orig_patent_app_number] => 742813 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/742813
Data storage medium incorporating a transition metal for increased switching speed Jun 9, 1985 Issued
Array ( [id] => 2230147 [patent_doc_number] => 04625300 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-11-25 [patent_title] => 'Single-ended sense amplifier for dynamic memory array' [patent_app_type] => 1 [patent_app_number] => 6/741205 [patent_app_country] => US [patent_app_date] => 1985-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2115 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/625/04625300.pdf [firstpage_image] =>[orig_patent_app_number] => 741205 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/741205
Single-ended sense amplifier for dynamic memory array Jun 3, 1985 Issued
Array ( [id] => 2331845 [patent_doc_number] => 04636990 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-13 [patent_title] => 'Three state select circuit for use in a data processing system or the like' [patent_app_type] => 1 [patent_app_number] => 6/739785 [patent_app_country] => US [patent_app_date] => 1985-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3788 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 462 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/636/04636990.pdf [firstpage_image] =>[orig_patent_app_number] => 739785 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/739785
Three state select circuit for use in a data processing system or the like May 30, 1985 Issued
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