Search

Danielle Jackson

Examiner (ID: 13276, Phone: (571)272-2268 , Office: P/3636 )

Most Active Art Unit
3636
Art Unit(s)
3636
Total Applications
1037
Issued Applications
648
Pending Applications
53
Abandoned Applications
355

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2317324 [patent_doc_number] => 04638462 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-20 [patent_title] => 'Self-timed precharge circuit' [patent_app_type] => 1 [patent_app_number] => 6/696624 [patent_app_country] => US [patent_app_date] => 1985-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2340 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 362 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/638/04638462.pdf [firstpage_image] =>[orig_patent_app_number] => 696624 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/696624
Self-timed precharge circuit Jan 30, 1985 Issued
Array ( [id] => 2418337 [patent_doc_number] => 04761765 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-08-02 [patent_title] => 'Semiconductor memory device having improved data output circuit' [patent_app_type] => 1 [patent_app_number] => 6/690904 [patent_app_country] => US [patent_app_date] => 1985-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5280 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 618 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/761/04761765.pdf [firstpage_image] =>[orig_patent_app_number] => 690904 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/690904
Semiconductor memory device having improved data output circuit Jan 13, 1985 Issued
Array ( [id] => 2331821 [patent_doc_number] => 04636988 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-13 [patent_title] => 'CMOS memory arrangement with reduced data line compacitance' [patent_app_type] => 1 [patent_app_number] => 6/689254 [patent_app_country] => US [patent_app_date] => 1985-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 3657 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/636/04636988.pdf [firstpage_image] =>[orig_patent_app_number] => 689254 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/689254
CMOS memory arrangement with reduced data line compacitance Jan 6, 1985 Issued
Array ( [id] => 2317375 [patent_doc_number] => 04638466 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-20 [patent_title] => 'Programmable semiconductor memory device having separate read word line drivers and write-only word line drivers' [patent_app_type] => 1 [patent_app_number] => 6/687353 [patent_app_country] => US [patent_app_date] => 1984-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3170 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/638/04638466.pdf [firstpage_image] =>[orig_patent_app_number] => 687353 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/687353
Programmable semiconductor memory device having separate read word line drivers and write-only word line drivers Dec 30, 1984 Issued
06/685553 SEMICONDUCTOR MEMORY WITH AN IMPROVED NIBBLE MODE ARRANGEMENT INCLUDING A TIMING GENERATOR FOR DETECTING CHANGES IN THE COLUMN ADDRESS STROBE SIGNALS Dec 23, 1984 Abandoned
Array ( [id] => 2227721 [patent_doc_number] => 04628486 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-12-09 [patent_title] => 'MOS dynamic random access memory' [patent_app_type] => 1 [patent_app_number] => 6/681024 [patent_app_country] => US [patent_app_date] => 1984-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3337 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/628/04628486.pdf [firstpage_image] =>[orig_patent_app_number] => 681024 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/681024
MOS dynamic random access memory Dec 12, 1984 Issued
Array ( [id] => 2273023 [patent_doc_number] => 04612632 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-09-16 [patent_title] => 'Power transition write protection for PROM' [patent_app_type] => 1 [patent_app_number] => 6/679784 [patent_app_country] => US [patent_app_date] => 1984-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2483 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/612/04612632.pdf [firstpage_image] =>[orig_patent_app_number] => 679784 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/679784
Power transition write protection for PROM Dec 9, 1984 Issued
Array ( [id] => 2353053 [patent_doc_number] => 04649521 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-03-10 [patent_title] => 'Programmable read-only memory (PROM) device having reduced programming voltage capability' [patent_app_type] => 1 [patent_app_number] => 6/674813 [patent_app_country] => US [patent_app_date] => 1984-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 4340 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/649/04649521.pdf [firstpage_image] =>[orig_patent_app_number] => 674813 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/674813
Programmable read-only memory (PROM) device having reduced programming voltage capability Nov 25, 1984 Issued
Array ( [id] => 2360758 [patent_doc_number] => 04651302 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-03-17 [patent_title] => 'Read only memory including an isolation network connected between the array of memory cells and the output sense amplifier whereby reading speed is enhanced' [patent_app_type] => 1 [patent_app_number] => 6/674213 [patent_app_country] => US [patent_app_date] => 1984-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1693 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 879 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/651/04651302.pdf [firstpage_image] =>[orig_patent_app_number] => 674213 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/674213
Read only memory including an isolation network connected between the array of memory cells and the output sense amplifier whereby reading speed is enhanced Nov 22, 1984 Issued
Array ( [id] => 2393111 [patent_doc_number] => 04707811 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-11-17 [patent_title] => 'Semiconductor memory device having extended period for outputting data' [patent_app_type] => 1 [patent_app_number] => 6/674313 [patent_app_country] => US [patent_app_date] => 1984-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3470 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/707/04707811.pdf [firstpage_image] =>[orig_patent_app_number] => 674313 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/674313
Semiconductor memory device having extended period for outputting data Nov 22, 1984 Issued
Array ( [id] => 2300768 [patent_doc_number] => 04653024 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-03-24 [patent_title] => 'Data storage device including a phase changeable material' [patent_app_type] => 1 [patent_app_number] => 6/674112 [patent_app_country] => US [patent_app_date] => 1984-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 4813 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/653/04653024.pdf [firstpage_image] =>[orig_patent_app_number] => 674112 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/674112
Data storage device including a phase changeable material Nov 20, 1984 Issued
Array ( [id] => 2347652 [patent_doc_number] => 04661926 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-04-28 [patent_title] => 'Bit line gain circuit for read only memory' [patent_app_type] => 1 [patent_app_number] => 6/674103 [patent_app_country] => US [patent_app_date] => 1984-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2752 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 388 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/661/04661926.pdf [firstpage_image] =>[orig_patent_app_number] => 674103 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/674103
Bit line gain circuit for read only memory Nov 19, 1984 Issued
06/667294 METHOD OF FORMING AN OPTICAL DATA STORAGE DEVICE Oct 31, 1984 Abandoned
06/666854 SCHEME FOR ADDRESSING DUAL ENDED ADAPTIVE FOLDED BITLINE Oct 30, 1984 Abandoned
Array ( [id] => 2397982 [patent_doc_number] => 04663742 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-05-05 [patent_title] => 'Directory memory system having simultaneous write, compare and bypass capabilites' [patent_app_type] => 1 [patent_app_number] => 6/666580 [patent_app_country] => US [patent_app_date] => 1984-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4850 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/663/04663742.pdf [firstpage_image] =>[orig_patent_app_number] => 666580 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/666580
Directory memory system having simultaneous write, compare and bypass capabilites Oct 29, 1984 Issued
Array ( [id] => 2421936 [patent_doc_number] => 04719599 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-01-12 [patent_title] => 'Programmable read-only memory device provided with test cells' [patent_app_type] => 1 [patent_app_number] => 6/666515 [patent_app_country] => US [patent_app_date] => 1984-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 5423 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/719/04719599.pdf [firstpage_image] =>[orig_patent_app_number] => 666515 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/666515
Programmable read-only memory device provided with test cells Oct 29, 1984 Issued
Array ( [id] => 2336840 [patent_doc_number] => 04635231 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-01-06 [patent_title] => 'Semiconductor memory with constant readout capability' [patent_app_type] => 1 [patent_app_number] => 6/662900 [patent_app_country] => US [patent_app_date] => 1984-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2067 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/635/04635231.pdf [firstpage_image] =>[orig_patent_app_number] => 662900 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/662900
Semiconductor memory with constant readout capability Oct 18, 1984 Issued
Array ( [id] => 2266202 [patent_doc_number] => 04598389 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-07-01 [patent_title] => 'Single-ended CMOS sense amplifier' [patent_app_type] => 1 [patent_app_number] => 6/656283 [patent_app_country] => US [patent_app_date] => 1984-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1485 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/598/04598389.pdf [firstpage_image] =>[orig_patent_app_number] => 656283 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/656283
Single-ended CMOS sense amplifier Sep 30, 1984 Issued
Array ( [id] => 2300750 [patent_doc_number] => 04653023 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-03-24 [patent_title] => 'Plural-bit-per-cell read-only memory' [patent_app_type] => 1 [patent_app_number] => 6/651364 [patent_app_country] => US [patent_app_date] => 1984-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 3893 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 370 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/653/04653023.pdf [firstpage_image] =>[orig_patent_app_number] => 651364 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/651364
Plural-bit-per-cell read-only memory Sep 16, 1984 Issued
Array ( [id] => 2322077 [patent_doc_number] => 04716551 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-12-29 [patent_title] => 'Semiconductor memory device with variable self-refresh cycle' [patent_app_type] => 1 [patent_app_number] => 6/650153 [patent_app_country] => US [patent_app_date] => 1984-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 6019 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/716/04716551.pdf [firstpage_image] =>[orig_patent_app_number] => 650153 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/650153
Semiconductor memory device with variable self-refresh cycle Sep 12, 1984 Issued
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