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Danielle Jackson

Examiner (ID: 13276, Phone: (571)272-2268 , Office: P/3636 )

Most Active Art Unit
3636
Art Unit(s)
3636
Total Applications
1037
Issued Applications
648
Pending Applications
53
Abandoned Applications
355

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2361158 [patent_doc_number] => 04688196 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-08-18 [patent_title] => 'Semiconductor dynamic memory device with less power consumption in internal refresh mode' [patent_app_type] => 1 [patent_app_number] => 6/647573 [patent_app_country] => US [patent_app_date] => 1984-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5920 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/688/04688196.pdf [firstpage_image] =>[orig_patent_app_number] => 647573 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/647573
Semiconductor dynamic memory device with less power consumption in internal refresh mode Sep 5, 1984 Issued
Array ( [id] => 2456062 [patent_doc_number] => 04791613 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-12-13 [patent_title] => 'Bit line and column circuitry used in a semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 6/633091 [patent_app_country] => US [patent_app_date] => 1984-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3077 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/791/04791613.pdf [firstpage_image] =>[orig_patent_app_number] => 633091 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/633091
Bit line and column circuitry used in a semiconductor memory Jul 24, 1984 Issued
Array ( [id] => 2624102 [patent_doc_number] => 04943943 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-07-24 [patent_title] => 'Read-out circuit for semiconductor nonvolatile memory' [patent_app_type] => 1 [patent_app_number] => 6/633863 [patent_app_country] => US [patent_app_date] => 1984-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 6 [patent_no_of_words] => 1372 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/943/04943943.pdf [firstpage_image] =>[orig_patent_app_number] => 633863 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/633863
Read-out circuit for semiconductor nonvolatile memory Jul 23, 1984 Issued
06/630984 PROGRAMMABLE LOGIC ARRAY Jul 15, 1984 Abandoned
Array ( [id] => 2424088 [patent_doc_number] => 04747083 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-05-24 [patent_title] => 'Semiconductor memory with segmented word lines' [patent_app_type] => 1 [patent_app_number] => 6/625674 [patent_app_country] => US [patent_app_date] => 1984-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3756 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/747/04747083.pdf [firstpage_image] =>[orig_patent_app_number] => 625674 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/625674
Semiconductor memory with segmented word lines Jun 27, 1984 Issued
Array ( [id] => 2335356 [patent_doc_number] => 04672583 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-06-09 [patent_title] => 'Dynamic random access memory device provided with test circuit for internal refresh circuit' [patent_app_type] => 1 [patent_app_number] => 6/620984 [patent_app_country] => US [patent_app_date] => 1984-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 9381 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/672/04672583.pdf [firstpage_image] =>[orig_patent_app_number] => 620984 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/620984
Dynamic random access memory device provided with test circuit for internal refresh circuit Jun 14, 1984 Issued
Array ( [id] => 2422892 [patent_doc_number] => 04744063 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-05-10 [patent_title] => 'Static memory utilizing transition detectors to reduce power consumption' [patent_app_type] => 1 [patent_app_number] => 6/613614 [patent_app_country] => US [patent_app_date] => 1984-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5181 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/744/04744063.pdf [firstpage_image] =>[orig_patent_app_number] => 613614 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/613614
Static memory utilizing transition detectors to reduce power consumption May 23, 1984 Issued
Array ( [id] => 2246136 [patent_doc_number] => 04608667 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-08-26 [patent_title] => 'Dual mode logic circuit for a memory array' [patent_app_type] => 1 [patent_app_number] => 6/611564 [patent_app_country] => US [patent_app_date] => 1984-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2980 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/608/04608667.pdf [firstpage_image] =>[orig_patent_app_number] => 611564 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/611564
Dual mode logic circuit for a memory array May 17, 1984 Issued
Array ( [id] => 2639452 [patent_doc_number] => 04916665 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-04-10 [patent_title] => 'Semiconductor memory device with P-channel MOS transistor load circuit' [patent_app_type] => 1 [patent_app_number] => 6/610704 [patent_app_country] => US [patent_app_date] => 1984-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3723 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/916/04916665.pdf [firstpage_image] =>[orig_patent_app_number] => 610704 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/610704
Semiconductor memory device with P-channel MOS transistor load circuit May 15, 1984 Issued
06/600304 PROGRAMMABLE ARRAY Apr 12, 1984 Abandoned
06/594184 STACKED DOUBLE DENSITY MEMORY MODULE USING INDUSTRY STANDARD MEMORY CHIPS Mar 27, 1984 Abandoned
Array ( [id] => 2309647 [patent_doc_number] => 04644502 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-02-17 [patent_title] => 'Semiconductor memory device typically used as a video ram' [patent_app_type] => 1 [patent_app_number] => 6/593294 [patent_app_country] => US [patent_app_date] => 1984-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5497 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/644/04644502.pdf [firstpage_image] =>[orig_patent_app_number] => 593294 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/593294
Semiconductor memory device typically used as a video ram Mar 25, 1984 Issued
Array ( [id] => 2218438 [patent_doc_number] => 04599707 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-07-08 [patent_title] => 'Byte wide EEPROM with individual write circuits and write prevention means' [patent_app_type] => 1 [patent_app_number] => 6/585319 [patent_app_country] => US [patent_app_date] => 1984-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5537 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/599/04599707.pdf [firstpage_image] =>[orig_patent_app_number] => 585319 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/585319
Byte wide EEPROM with individual write circuits and write prevention means Feb 29, 1984 Issued
Array ( [id] => 2275601 [patent_doc_number] => 04584669 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-04-22 [patent_title] => 'Memory cell with latent image capabilities' [patent_app_type] => 1 [patent_app_number] => 6/584033 [patent_app_country] => US [patent_app_date] => 1984-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3854 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/584/04584669.pdf [firstpage_image] =>[orig_patent_app_number] => 584033 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/584033
Memory cell with latent image capabilities Feb 26, 1984 Issued
Array ( [id] => 2420942 [patent_doc_number] => 04725984 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-02-16 [patent_title] => 'CMOS eprom sense amplifier' [patent_app_type] => 1 [patent_app_number] => 6/581684 [patent_app_country] => US [patent_app_date] => 1984-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3175 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/725/04725984.pdf [firstpage_image] =>[orig_patent_app_number] => 581684 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/581684
CMOS eprom sense amplifier Feb 20, 1984 Issued
Array ( [id] => 2253614 [patent_doc_number] => 04606013 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-08-12 [patent_title] => 'Redundancy-secured semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 6/579604 [patent_app_country] => US [patent_app_date] => 1984-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2227 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/606/04606013.pdf [firstpage_image] =>[orig_patent_app_number] => 579604 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/579604
Redundancy-secured semiconductor memory Feb 12, 1984 Issued
Array ( [id] => 2226985 [patent_doc_number] => 04609999 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-09-02 [patent_title] => 'RAM memory cell with electrically programmable non-volatile memory element' [patent_app_type] => 1 [patent_app_number] => 6/572453 [patent_app_country] => US [patent_app_date] => 1984-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2691 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/609/04609999.pdf [firstpage_image] =>[orig_patent_app_number] => 572453 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/572453
RAM memory cell with electrically programmable non-volatile memory element Jan 19, 1984 Issued
Array ( [id] => 2477608 [patent_doc_number] => 04845674 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-07-04 [patent_title] => 'Semiconductor memory cell including cross-coupled bipolar transistors and Schottky diodes' [patent_app_type] => 1 [patent_app_number] => 6/569873 [patent_app_country] => US [patent_app_date] => 1984-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 2810 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/845/04845674.pdf [firstpage_image] =>[orig_patent_app_number] => 569873 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/569873
Semiconductor memory cell including cross-coupled bipolar transistors and Schottky diodes Jan 10, 1984 Issued
06/566554 MEMORY CARD HAVING SHUTTER PROTECTED TERMINALS Dec 28, 1983 Abandoned
Array ( [id] => 2247219 [patent_doc_number] => 04617653 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-10-14 [patent_title] => 'Semiconductor memory device utilizing multi-stage decoding' [patent_app_type] => 1 [patent_app_number] => 6/566323 [patent_app_country] => US [patent_app_date] => 1983-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5561 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/617/04617653.pdf [firstpage_image] =>[orig_patent_app_number] => 566323 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/566323
Semiconductor memory device utilizing multi-stage decoding Dec 27, 1983 Issued
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