Search

Danny Chan

Examiner (ID: 13069, Phone: (571)270-5134 , Office: P/2115 )

Most Active Art Unit
2186
Art Unit(s)
2116, 2186, 2115, 2175
Total Applications
500
Issued Applications
382
Pending Applications
36
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12003992 [patent_doc_number] => 20170308147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'POWER SHIFTING IN MULTICORE PLATFORMS BY VARYING SMT LEVELS' [patent_app_type] => utility [patent_app_number] => 15/605154 [patent_app_country] => US [patent_app_date] => 2017-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8578 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15605154 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/605154
Power shifting in multicore platforms by varying SMT levels May 24, 2017 Issued
Array ( [id] => 18046649 [patent_doc_number] => 11520603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Method for configuring a cooking appliance by a terminal [patent_app_type] => utility [patent_app_number] => 16/098373 [patent_app_country] => US [patent_app_date] => 2017-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6169 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16098373 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/098373
Method for configuring a cooking appliance by a terminal Apr 27, 2017 Issued
Array ( [id] => 11853521 [patent_doc_number] => 20170228013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-10 [patent_title] => 'Power Managing Method For Avoiding Sudden Drop In Voltage And Electronic System Applying The Power Managing Method' [patent_app_type] => utility [patent_app_number] => 15/499801 [patent_app_country] => US [patent_app_date] => 2017-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3392 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15499801 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/499801
Power Managing Method For Avoiding Sudden Drop In Voltage And Electronic System Applying The Power Managing Method Apr 26, 2017 Abandoned
Array ( [id] => 13516045 [patent_doc_number] => 20180309565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-25 [patent_title] => CORRELATING LOCAL TIME COUNTS OF FIRST AND SECOND INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 15/493429 [patent_app_country] => US [patent_app_date] => 2017-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8816 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15493429 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/493429
Correlating local time counts of first and second integrated circuits Apr 20, 2017 Issued
Array ( [id] => 12094219 [patent_doc_number] => 20170351312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-07 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/482187 [patent_app_country] => US [patent_app_date] => 2017-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6459 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15482187 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/482187
SEMICONDUCTOR DEVICE Apr 6, 2017 Abandoned
Array ( [id] => 12221401 [patent_doc_number] => 20180059761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'METHOD OF MANAGING POWER AND PERFORMANCE OF AN ELECTRONIC DEVICE INCLUDING A PLURALITY OF CAPACITORS FOR SUPPLYING AUXILIARY POWER' [patent_app_type] => utility [patent_app_number] => 15/481450 [patent_app_country] => US [patent_app_date] => 2017-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8647 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15481450 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/481450
METHOD OF MANAGING POWER AND PERFORMANCE OF AN ELECTRONIC DEVICE INCLUDING A PLURALITY OF CAPACITORS FOR SUPPLYING AUXILIARY POWER Apr 5, 2017 Abandoned
Array ( [id] => 13360933 [patent_doc_number] => 20180232006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-16 [patent_title] => REDUCING TIME OF DAY LATENCY VARIATION IN A MULTI-PROCESSOR SYSTEM [patent_app_type] => utility [patent_app_number] => 15/433214 [patent_app_country] => US [patent_app_date] => 2017-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3293 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15433214 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/433214
Reducing time of day latency variation in a multi-processor system Feb 14, 2017 Issued
Array ( [id] => 14797869 [patent_doc_number] => 10401937 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Method and apparatus for detection of battery drain [patent_app_type] => utility [patent_app_number] => 15/432450 [patent_app_country] => US [patent_app_date] => 2017-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7665 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15432450 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/432450
Method and apparatus for detection of battery drain Feb 13, 2017 Issued
Array ( [id] => 13346763 [patent_doc_number] => 20180224921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-09 [patent_title] => Clock Glitch Prevention for Retention Operational Mode [patent_app_type] => utility [patent_app_number] => 15/425980 [patent_app_country] => US [patent_app_date] => 2017-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13824 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15425980 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/425980
Clock glitch prevention for retention operational mode Feb 5, 2017 Issued
Array ( [id] => 14824633 [patent_doc_number] => 10409321 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-10 [patent_title] => Simulation system with clock and messaging synchronization [patent_app_type] => utility [patent_app_number] => 15/423829 [patent_app_country] => US [patent_app_date] => 2017-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6416 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15423829 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/423829
Simulation system with clock and messaging synchronization Feb 2, 2017 Issued
Array ( [id] => 11823614 [patent_doc_number] => 20170212551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-27 [patent_title] => 'SEMICONDUCTOR DEVICE, A SEMICONDUCTOR SYSTEM, AND A METHOD OF OPERATING THE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/415020 [patent_app_country] => US [patent_app_date] => 2017-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8544 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15415020 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/415020
Semiconductor device for stopping an oscillating clock signal from being provided to an IP block, a semiconductor system having the semiconductor device, and a method of operating the semiconductor device Jan 24, 2017 Issued
Array ( [id] => 13318001 [patent_doc_number] => 20180210538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-26 [patent_title] => POWER DISTRIBUTION UNIT SELF-IDENTIFICATION [patent_app_type] => utility [patent_app_number] => 15/415500 [patent_app_country] => US [patent_app_date] => 2017-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9569 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15415500 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/415500
Power distribution unit self-identification Jan 24, 2017 Issued
Array ( [id] => 13304343 [patent_doc_number] => 20180203708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-19 [patent_title] => CUSTOMIZABLE FIRMWARE BASED ON ACCESS ATTRIBUTES [patent_app_type] => utility [patent_app_number] => 15/409030 [patent_app_country] => US [patent_app_date] => 2017-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9494 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15409030 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/409030
Customizable firmware based on access attributes Jan 17, 2017 Issued
Array ( [id] => 13304493 [patent_doc_number] => 20180203783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-19 [patent_title] => PERFORMANCE OF A SYSTEM INCLUDING A FIRST PROCESSOR AND A SECOND PROCESSOR [patent_app_type] => utility [patent_app_number] => 15/409241 [patent_app_country] => US [patent_app_date] => 2017-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15409241 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/409241
Evaluating performance improvement of executing instructions in a first processor over execution on a second processor Jan 17, 2017 Issued
Array ( [id] => 16408845 [patent_doc_number] => 10817398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-27 [patent_title] => Data center management via out-of-band, low-pin count, external access to local motherboard monitoring and control [patent_app_type] => utility [patent_app_number] => 15/400648 [patent_app_country] => US [patent_app_date] => 2017-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 26210 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15400648 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/400648
Data center management via out-of-band, low-pin count, external access to local motherboard monitoring and control Jan 5, 2017 Issued
Array ( [id] => 11570662 [patent_doc_number] => 20170109306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-20 [patent_title] => 'APPARATUS AND METHOD FOR DYNAMICALLY ALIGNED SOURCE SYNCHRONOUS RECEIVER' [patent_app_type] => utility [patent_app_number] => 15/389795 [patent_app_country] => US [patent_app_date] => 2016-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 14174 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15389795 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/389795
Apparatus and method for dynamically aligned source synchronous receiver Dec 22, 2016 Issued
Array ( [id] => 13121383 [patent_doc_number] => 10079046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-18 [patent_title] => Apparatus and method for dynamically aligned source synchronous receiver [patent_app_type] => utility [patent_app_number] => 15/389763 [patent_app_country] => US [patent_app_date] => 2016-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 13255 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15389763 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/389763
Apparatus and method for dynamically aligned source synchronous receiver Dec 22, 2016 Issued
Array ( [id] => 12194308 [patent_doc_number] => 09898036 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-20 [patent_title] => 'Apparatus and method for automatically aligning data signals and strobe signals on a source synchronous bus' [patent_app_type] => utility [patent_app_number] => 15/389538 [patent_app_country] => US [patent_app_date] => 2016-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 13997 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15389538 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/389538
Apparatus and method for automatically aligning data signals and strobe signals on a source synchronous bus Dec 22, 2016 Issued
Array ( [id] => 13241005 [patent_doc_number] => 10133701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-20 [patent_title] => Apparatus and method for automatically aligning data signals and strobe signals on a source synchronous bus [patent_app_type] => utility [patent_app_number] => 15/389544 [patent_app_country] => US [patent_app_date] => 2016-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 12996 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15389544 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/389544
Apparatus and method for automatically aligning data signals and strobe signals on a source synchronous bus Dec 22, 2016 Issued
Array ( [id] => 11556789 [patent_doc_number] => 20170103035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-13 [patent_title] => 'APPARATUS AND METHOD FOR LOCALLY OPTIMIZING SOURCE SYNCHRONOUS DATA STROBES' [patent_app_type] => utility [patent_app_number] => 15/389528 [patent_app_country] => US [patent_app_date] => 2016-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 13825 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15389528 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/389528
Apparatus and method for locally optimizing source synchronous data strobes Dec 22, 2016 Issued
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