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Danny Chan

Examiner (ID: 13069, Phone: (571)270-5134 , Office: P/2115 )

Most Active Art Unit
2186
Art Unit(s)
2116, 2186, 2115, 2175
Total Applications
500
Issued Applications
382
Pending Applications
36
Abandoned Applications
91

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7735794 [patent_doc_number] => 20120017073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'CONFIGURATION OF A BASIC INPUT/OUTPUT SYSTEM (BIOS) OF A COMPUTING DEVICE' [patent_app_type] => utility [patent_app_number] => 13/259819 [patent_app_country] => US [patent_app_date] => 2009-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5168 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20120017073.pdf [firstpage_image] =>[orig_patent_app_number] => 13259819 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/259819
Configuration of a basic input/output system (BIOS) based on a series of follow up questions tailored to user type Dec 8, 2009 Issued
Array ( [id] => 8143397 [patent_doc_number] => 20120096248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'POWER-CAP SETTINGS' [patent_app_type] => utility [patent_app_number] => 13/258384 [patent_app_country] => US [patent_app_date] => 2009-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1712 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20120096248.pdf [firstpage_image] =>[orig_patent_app_number] => 13258384 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/258384
Decrementing settings for a range of power caps when a power cap is exceeded Nov 30, 2009 Issued
Array ( [id] => 8046053 [patent_doc_number] => 20120072761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'Device and method for implementing clock transparent transmission' [patent_app_type] => utility [patent_app_number] => 13/258401 [patent_app_country] => US [patent_app_date] => 2009-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5112 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20120072761.pdf [firstpage_image] =>[orig_patent_app_number] => 13258401 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/258401
Implementing transparent clock by correcting time information carried in data using residence time information Sep 16, 2009 Issued
Array ( [id] => 7735792 [patent_doc_number] => 20120017072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'MODIFYING A VIDEO RESOLUTION OF VIDEO DATA IN A PRE-OPERATING SYSTEM ENVIRONMENT' [patent_app_type] => utility [patent_app_number] => 13/259559 [patent_app_country] => US [patent_app_date] => 2009-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2575 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20120017072.pdf [firstpage_image] =>[orig_patent_app_number] => 13259559 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/259559
MODIFYING A VIDEO RESOLUTION OF VIDEO DATA IN A PRE-OPERATING SYSTEM ENVIRONMENT Jul 13, 2009 Abandoned
Array ( [id] => 7746907 [patent_doc_number] => 20120023350 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-26 [patent_title] => 'METHOD FOR ACTIVE POWER MANAGEMENT IN A SERIAL ATA INTERFACE' [patent_app_type] => utility [patent_app_number] => 13/259595 [patent_app_country] => US [patent_app_date] => 2009-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1807 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20120023350.pdf [firstpage_image] =>[orig_patent_app_number] => 13259595 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/259595
Method for active power management in a Serial ATA interface to operate at most a predetermined rate upon a refused speed request Jun 6, 2009 Issued
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