
Danny Hong
Examiner (ID: 2133, Phone: (571)270-5107 , Office: P/3727 )
| Most Active Art Unit | 3727 |
| Art Unit(s) | 3727, 3723 |
| Total Applications | 485 |
| Issued Applications | 270 |
| Pending Applications | 0 |
| Abandoned Applications | 215 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20509254
[patent_doc_number] => 12543547
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-02-03
[patent_title] => Method of dielectric material fill and treatment
[patent_app_type] => utility
[patent_app_number] => 18/781633
[patent_app_country] => US
[patent_app_date] => 2024-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 2325
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18781633
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/781633 | Method of dielectric material fill and treatment | Jul 22, 2024 | Issued |
Array
(
[id] => 20237660
[patent_doc_number] => 20250294979
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-18
[patent_title] => DISPLAY PANEL HAVING IMPROVED LIGHT-EMITTING STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/610778
[patent_app_country] => US
[patent_app_date] => 2024-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4492
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18610778
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/610778 | DISPLAY PANEL HAVING IMPROVED LIGHT-EMITTING STRUCTURE | Mar 19, 2024 | Pending |
Array
(
[id] => 20244224
[patent_doc_number] => 12424556
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-23
[patent_title] => Semiconductor device with adjustment layers and method for fabricating the same
[patent_app_type] => utility
[patent_app_number] => 18/596978
[patent_app_country] => US
[patent_app_date] => 2024-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 32
[patent_no_of_words] => 3349
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18596978
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/596978 | Semiconductor device with adjustment layers and method for fabricating the same | Mar 5, 2024 | Issued |
Array
(
[id] => 19407160
[patent_doc_number] => 20240290671
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-29
[patent_title] => SEMICONDUCTOR PACKAGE WITH IMPROVED SPACE UTILIZATION AND METHOD FOR MAKING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/582697
[patent_app_country] => US
[patent_app_date] => 2024-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6689
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18582697
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/582697 | SEMICONDUCTOR PACKAGE WITH IMPROVED SPACE UTILIZATION AND METHOD FOR MAKING THE SAME | Feb 20, 2024 | Pending |
Array
(
[id] => 19335547
[patent_doc_number] => 20240249977
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-25
[patent_title] => METAL ADHESION LAYER TO PROMOTE METAL PLUG ADHESION
[patent_app_type] => utility
[patent_app_number] => 18/583194
[patent_app_country] => US
[patent_app_date] => 2024-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6984
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18583194
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/583194 | METAL ADHESION LAYER TO PROMOTE METAL PLUG ADHESION | Feb 20, 2024 | Pending |
Array
(
[id] => 20649762
[patent_doc_number] => 12604725
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-04-14
[patent_title] => Interlevel dielectric structure in semiconductor device
[patent_app_type] => utility
[patent_app_number] => 18/432064
[patent_app_country] => US
[patent_app_date] => 2024-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 0
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18432064
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/432064 | SEMICONDUCTOR DEVICE | Feb 4, 2024 | Issued |
Array
(
[id] => 19176109
[patent_doc_number] => 20240162083
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-16
[patent_title] => BILAYER SEAL MATERIAL FOR AIR GAPS IN SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/421155
[patent_app_country] => US
[patent_app_date] => 2024-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11069
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18421155
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/421155 | Bilayer seal material for air gaps in semiconductor devices | Jan 23, 2024 | Issued |
Array
(
[id] => 20056220
[patent_doc_number] => 20250194442
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-12
[patent_title] => RESISTIVE MEMORY WITH ANGLED ELECTRODE PROFILE
[patent_app_type] => utility
[patent_app_number] => 18/532551
[patent_app_country] => US
[patent_app_date] => 2023-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3406
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 42
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18532551
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/532551 | RESISTIVE MEMORY WITH ANGLED ELECTRODE PROFILE | Dec 6, 2023 | Pending |
Array
(
[id] => 19894755
[patent_doc_number] => 20250120067
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-10
[patent_title] => EDRAM AND METHOD FOR MAKING SAME
[patent_app_type] => utility
[patent_app_number] => 18/514907
[patent_app_country] => US
[patent_app_date] => 2023-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5515
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 301
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18514907
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/514907 | EDRAM AND METHOD FOR MAKING SAME | Nov 19, 2023 | Pending |
Array
(
[id] => 19269475
[patent_doc_number] => 20240213179
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-27
[patent_title] => SEMICONDUCTOR PACKAGE HAVING REINFORCING STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/507571
[patent_app_country] => US
[patent_app_date] => 2023-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6218
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18507571
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/507571 | SEMICONDUCTOR PACKAGE HAVING REINFORCING STRUCTURE | Nov 12, 2023 | Pending |
Array
(
[id] => 19995562
[patent_doc_number] => 20250133784
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-24
[patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/490081
[patent_app_country] => US
[patent_app_date] => 2023-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17097
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18490081
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/490081 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME | Oct 18, 2023 | Pending |
Array
(
[id] => 19305242
[patent_doc_number] => 20240233822
[patent_country] => US
[patent_kind] => A9
[patent_issue_date] => 2024-07-11
[patent_title] => 3D MEMORY CELLS AND ARRAY STRUCTURES
[patent_app_type] => utility
[patent_app_number] => 18/489844
[patent_app_country] => US
[patent_app_date] => 2023-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4590
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -1
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18489844
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/489844 | 3D MEMORY CELLS AND ARRAY STRUCTURES | Oct 17, 2023 | Pending |
Array
(
[id] => 19305242
[patent_doc_number] => 20240233822
[patent_country] => US
[patent_kind] => A9
[patent_issue_date] => 2024-07-11
[patent_title] => 3D MEMORY CELLS AND ARRAY STRUCTURES
[patent_app_type] => utility
[patent_app_number] => 18/489844
[patent_app_country] => US
[patent_app_date] => 2023-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4590
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -1
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18489844
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/489844 | 3D MEMORY CELLS AND ARRAY STRUCTURES | Oct 16, 2023 | Pending |
Array
(
[id] => 19255232
[patent_doc_number] => 20240206229
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-20
[patent_title] => DISPLAY APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/370796
[patent_app_country] => US
[patent_app_date] => 2023-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11638
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18370796
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/370796 | DISPLAY APPARATUS | Sep 19, 2023 | Pending |
Array
(
[id] => 19285919
[patent_doc_number] => 20240222396
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-04
[patent_title] => ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL
[patent_app_type] => utility
[patent_app_number] => 18/369860
[patent_app_country] => US
[patent_app_date] => 2023-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4918
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18369860
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/369860 | ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL | Sep 18, 2023 | Pending |
Array
(
[id] => 18882859
[patent_doc_number] => 20240006228
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-04
[patent_title] => Method for Forming a Buried Metal Line in a Semiconductor Substrate
[patent_app_type] => utility
[patent_app_number] => 18/469374
[patent_app_country] => US
[patent_app_date] => 2023-09-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5400
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18469374
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/469374 | Method for forming a buried metal line in a semiconductor substrate | Sep 17, 2023 | Issued |
Array
(
[id] => 20583047
[patent_doc_number] => 12575310
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-03-10
[patent_title] => Display apparatus having a repair wiring
[patent_app_type] => utility
[patent_app_number] => 18/369224
[patent_app_country] => US
[patent_app_date] => 2023-09-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 6800
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18369224
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/369224 | Display apparatus having a repair wiring | Sep 17, 2023 | Issued |
Array
(
[id] => 19758084
[patent_doc_number] => 20250046649
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-06
[patent_title] => HIGH VOLTAGE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME
[patent_app_type] => utility
[patent_app_number] => 18/467880
[patent_app_country] => US
[patent_app_date] => 2023-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5774
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18467880
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/467880 | HIGH VOLTAGE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME | Sep 14, 2023 | Pending |
Array
(
[id] => 19038140
[patent_doc_number] => 20240087955
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-14
[patent_title] => INTEGRATED PVD TUNGSTEN LINER AND SEAMLESS CVD TUNGSTEN FILL
[patent_app_type] => utility
[patent_app_number] => 18/241343
[patent_app_country] => US
[patent_app_date] => 2023-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12297
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18241343
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/241343 | INTEGRATED PVD TUNGSTEN LINER AND SEAMLESS CVD TUNGSTEN FILL | Aug 31, 2023 | Pending |
Array
(
[id] => 19749479
[patent_doc_number] => 20250038044
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-30
[patent_title] => MANAGING CONDUCTIVE CONNECTIONS FOR SEMICONDUCTIVE DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/459398
[patent_app_country] => US
[patent_app_date] => 2023-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10320
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459398
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/459398 | MANAGING CONDUCTIVE CONNECTIONS FOR SEMICONDUCTIVE DEVICES | Aug 30, 2023 | Pending |