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Dao H. Nguyen

Examiner (ID: 4524)

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2231
Issued Applications
1935
Pending Applications
150
Abandoned Applications
190

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19531883 [patent_doc_number] => 20240355785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => DIE STACK STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/761324 [patent_app_country] => US [patent_app_date] => 2024-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18794 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18761324 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/761324
DIE STACK STRUCTURE AND MANUFACTURING METHOD THEREOF Jul 1, 2024 Pending
Array ( [id] => 19531917 [patent_doc_number] => 20240355819 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => INTEGRATED CIRCUIT STRUCTURE WITH FRONT SIDE SIGNAL LINES AND BACKSIDE POWER DELIVERY [patent_app_type] => utility [patent_app_number] => 18/760970 [patent_app_country] => US [patent_app_date] => 2024-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16701 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18760970 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/760970
INTEGRATED CIRCUIT STRUCTURE WITH FRONT SIDE SIGNAL LINES AND BACKSIDE POWER DELIVERY Jun 30, 2024 Pending
Array ( [id] => 19500392 [patent_doc_number] => 20240339410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => DIRECT BONDING IN MICROELECTRONIC ASSEMBLIES [patent_app_type] => utility [patent_app_number] => 18/746188 [patent_app_country] => US [patent_app_date] => 2024-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18746188 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/746188
DIRECT BONDING IN MICROELECTRONIC ASSEMBLIES Jun 17, 2024 Pending
Array ( [id] => 19500338 [patent_doc_number] => 20240339356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => INSULATING CAP ON CONTACT STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/744961 [patent_app_country] => US [patent_app_date] => 2024-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18744961 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/744961
INSULATING CAP ON CONTACT STRUCTURE Jun 16, 2024 Pending
Array ( [id] => 19500338 [patent_doc_number] => 20240339356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => INSULATING CAP ON CONTACT STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/744961 [patent_app_country] => US [patent_app_date] => 2024-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18744961 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/744961
INSULATING CAP ON CONTACT STRUCTURE Jun 16, 2024 Pending
Array ( [id] => 19500338 [patent_doc_number] => 20240339356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => INSULATING CAP ON CONTACT STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/744961 [patent_app_country] => US [patent_app_date] => 2024-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18744961 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/744961
INSULATING CAP ON CONTACT STRUCTURE Jun 16, 2024 Pending
Array ( [id] => 19468086 [patent_doc_number] => 20240321756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SEMICONDUCTOR DEVICE HAVING WAFER-TO-WAFER BONDING STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/736384 [patent_app_country] => US [patent_app_date] => 2024-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7470 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18736384 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/736384
SEMICONDUCTOR DEVICE HAVING WAFER-TO-WAFER BONDING STRUCTURE AND MANUFACTURING METHOD THEREOF Jun 5, 2024 Pending
Array ( [id] => 19486629 [patent_doc_number] => 20240334671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/735797 [patent_app_country] => US [patent_app_date] => 2024-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13634 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18735797 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/735797
SEMICONDUCTOR DEVICE STRUCTURE Jun 5, 2024 Pending
Array ( [id] => 19468300 [patent_doc_number] => 20240321970 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR DEVICE, AND MANUFACTURING METHODS OF THE SAME [patent_app_type] => utility [patent_app_number] => 18/734613 [patent_app_country] => US [patent_app_date] => 2024-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32450 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18734613 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/734613
Semiconductor substrate, semiconductor device, and manufacturing methods of the same Jun 4, 2024 Issued
Array ( [id] => 19420918 [patent_doc_number] => 20240297042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/660980 [patent_app_country] => US [patent_app_date] => 2024-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7132 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660980 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/660980
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE May 9, 2024 Pending
Array ( [id] => 19420918 [patent_doc_number] => 20240297042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/660980 [patent_app_country] => US [patent_app_date] => 2024-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7132 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660980 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/660980
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE May 9, 2024 Pending
Array ( [id] => 19421108 [patent_doc_number] => 20240297232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/655409 [patent_app_country] => US [patent_app_date] => 2024-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10384 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18655409 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/655409
SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME May 5, 2024 Pending
Array ( [id] => 19421108 [patent_doc_number] => 20240297232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/655409 [patent_app_country] => US [patent_app_date] => 2024-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10384 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18655409 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/655409
SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME May 5, 2024 Pending
Array ( [id] => 19394782 [patent_doc_number] => 20240284652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => STATIC RANDOM-ACCESS MEMORY (SRAM) BIT CELL WITH CHANNEL DEPOPULATION [patent_app_type] => utility [patent_app_number] => 18/644874 [patent_app_country] => US [patent_app_date] => 2024-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10104 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18644874 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/644874
STATIC RANDOM-ACCESS MEMORY (SRAM) BIT CELL WITH CHANNEL DEPOPULATION Apr 23, 2024 Pending
Array ( [id] => 19394782 [patent_doc_number] => 20240284652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => STATIC RANDOM-ACCESS MEMORY (SRAM) BIT CELL WITH CHANNEL DEPOPULATION [patent_app_type] => utility [patent_app_number] => 18/644874 [patent_app_country] => US [patent_app_date] => 2024-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10104 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18644874 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/644874
STATIC RANDOM-ACCESS MEMORY (SRAM) BIT CELL WITH CHANNEL DEPOPULATION Apr 23, 2024 Pending
Array ( [id] => 19912590 [patent_doc_number] => 12288809 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-29 [patent_title] => Semiconductor device with doped structure [patent_app_type] => utility [patent_app_number] => 18/612701 [patent_app_country] => US [patent_app_date] => 2024-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2154 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18612701 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/612701
Semiconductor device with doped structure Mar 20, 2024 Issued
Array ( [id] => 19349202 [patent_doc_number] => 20240258166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => SELECTIVE DEPOSITION FOR INTEGRATED CIRCUIT INTERCONNECT STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/608673 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7162 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608673 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/608673
SELECTIVE DEPOSITION FOR INTEGRATED CIRCUIT INTERCONNECT STRUCTURES Mar 17, 2024 Pending
Array ( [id] => 19335508 [patent_doc_number] => 20240249938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => Gate Structures in Transistor Devices and Methods of Forming Same [patent_app_type] => utility [patent_app_number] => 18/599871 [patent_app_country] => US [patent_app_date] => 2024-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14729 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18599871 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/599871
Gate Structures in Transistor Devices and Methods of Forming Same Mar 7, 2024 Pending
Array ( [id] => 19337109 [patent_doc_number] => 20240251539 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => METHOD FOR FORMING DIFFERENT TYPES OF DEVICES [patent_app_type] => utility [patent_app_number] => 18/587506 [patent_app_country] => US [patent_app_date] => 2024-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9934 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18587506 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/587506
METHOD FOR FORMING DIFFERENT TYPES OF DEVICES Feb 25, 2024 Issued
Array ( [id] => 19237540 [patent_doc_number] => 20240194735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATING THE SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/585098 [patent_app_country] => US [patent_app_date] => 2024-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8589 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18585098 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/585098
Semiconductor structure and method of fabricating the semiconductor structure Feb 22, 2024 Issued
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