
Dao H. Nguyen
Examiner (ID: 14112, Phone: (571)272-1791 , Office: P/2818 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 2283 |
| Issued Applications | 1976 |
| Pending Applications | 142 |
| Abandoned Applications | 191 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7393290
[patent_doc_number] => 20040173811
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-09
[patent_title] => 'Light emitting device and electrical appliance'
[patent_app_type] => new
[patent_app_number] => 10/754701
[patent_app_country] => US
[patent_app_date] => 2004-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 11329
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 31
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0173/20040173811.pdf
[firstpage_image] =>[orig_patent_app_number] => 10754701
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/754701 | Light emitting device and electrical appliance | Jan 11, 2004 | Abandoned |
Array
(
[id] => 7441663
[patent_doc_number] => 20040195631
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-07
[patent_title] => 'Gate edge diode leakage reduction'
[patent_app_type] => new
[patent_app_number] => 10/755550
[patent_app_country] => US
[patent_app_date] => 2004-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1891
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0195/20040195631.pdf
[firstpage_image] =>[orig_patent_app_number] => 10755550
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/755550 | Gate edge diode leakage reduction | Jan 11, 2004 | Abandoned |
Array
(
[id] => 432631
[patent_doc_number] => 07265405
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-09-04
[patent_title] => 'Method for fabricating contacts for integrated circuits, and semiconductor component having such contacts'
[patent_app_type] => utility
[patent_app_number] => 10/754439
[patent_app_country] => US
[patent_app_date] => 2004-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 5649
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/265/07265405.pdf
[firstpage_image] =>[orig_patent_app_number] => 10754439
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/754439 | Method for fabricating contacts for integrated circuits, and semiconductor component having such contacts | Jan 8, 2004 | Issued |
Array
(
[id] => 7318859
[patent_doc_number] => 20040135195
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-15
[patent_title] => 'Flash memory cell and method of manufacturing the same, and programming/erasing/reading method in the flash memory cell'
[patent_app_type] => new
[patent_app_number] => 10/750850
[patent_app_country] => US
[patent_app_date] => 2004-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7287
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 17
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0135/20040135195.pdf
[firstpage_image] =>[orig_patent_app_number] => 10750850
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/750850 | Flash memory cell and method of manufacturing the same, and programming/erasing/reading method in the flash memory cell | Jan 4, 2004 | Issued |
Array
(
[id] => 7448350
[patent_doc_number] => 20040164386
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-08-26
[patent_title] => 'Unmolded package for a semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/754095
[patent_app_country] => US
[patent_app_date] => 2003-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1489
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 43
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0164/20040164386.pdf
[firstpage_image] =>[orig_patent_app_number] => 10754095
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/754095 | Unmolded package for a semiconductor device | Dec 28, 2003 | Issued |
Array
(
[id] => 7318934
[patent_doc_number] => 20040135253
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-15
[patent_title] => 'Semiconductor component with electrical characteristic adjustment circuitry'
[patent_app_type] => new
[patent_app_number] => 10/745040
[patent_app_country] => US
[patent_app_date] => 2003-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6358
[patent_no_of_claims] => 72
[patent_no_of_ind_claims] => 14
[patent_words_short_claim] => 48
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0135/20040135253.pdf
[firstpage_image] =>[orig_patent_app_number] => 10745040
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/745040 | Semiconductor component with electrical characteristic adjustment circuitry | Dec 21, 2003 | Issued |
Array
(
[id] => 7335468
[patent_doc_number] => 20040132252
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-08
[patent_title] => 'Method of forming a field effect transistor having a lateral depletion structure'
[patent_app_type] => new
[patent_app_number] => 10/741464
[patent_app_country] => US
[patent_app_date] => 2003-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 5562
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0132/20040132252.pdf
[firstpage_image] =>[orig_patent_app_number] => 10741464
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/741464 | Method of forming a field effect transistor having a lateral depletion structure | Dec 17, 2003 | Issued |
Array
(
[id] => 352618
[patent_doc_number] => 07491639
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-02-17
[patent_title] => 'Method of manufacturing a semiconductor device and semiconductor obtained by means of such a method'
[patent_app_type] => utility
[patent_app_number] => 10/539280
[patent_app_country] => US
[patent_app_date] => 2003-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 7
[patent_no_of_words] => 2689
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/491/07491639.pdf
[firstpage_image] =>[orig_patent_app_number] => 10539280
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/539280 | Method of manufacturing a semiconductor device and semiconductor obtained by means of such a method | Dec 14, 2003 | Issued |
Array
(
[id] => 4443390
[patent_doc_number] => 07928420
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-04-19
[patent_title] => 'Phase change tip storage cell'
[patent_app_type] => utility
[patent_app_number] => 10/732580
[patent_app_country] => US
[patent_app_date] => 2003-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 3292
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 89
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/928/07928420.pdf
[firstpage_image] =>[orig_patent_app_number] => 10732580
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/732580 | Phase change tip storage cell | Dec 9, 2003 | Issued |
Array
(
[id] => 7169023
[patent_doc_number] => 20050121699
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-09
[patent_title] => 'Dynamic threshold voltage MOSFET on SOI'
[patent_app_type] => utility
[patent_app_number] => 10/728750
[patent_app_country] => US
[patent_app_date] => 2003-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3026
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0121/20050121699.pdf
[firstpage_image] =>[orig_patent_app_number] => 10728750
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/728750 | Dynamic threshold voltage MOSFET on SOI | Dec 7, 2003 | Issued |
Array
(
[id] => 7301233
[patent_doc_number] => 20040113210
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-17
[patent_title] => 'Novel field effect transistor and method of fabrication'
[patent_app_type] => new
[patent_app_number] => 10/728608
[patent_app_country] => US
[patent_app_date] => 2003-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3920
[patent_no_of_claims] => 47
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 18
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0113/20040113210.pdf
[firstpage_image] =>[orig_patent_app_number] => 10728608
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/728608 | Novel field effect transistor and method of fabrication | Dec 4, 2003 | Abandoned |
Array
(
[id] => 7301270
[patent_doc_number] => 20040113247
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-17
[patent_title] => 'Flip-chip packaging'
[patent_app_type] => new
[patent_app_number] => 10/728449
[patent_app_country] => US
[patent_app_date] => 2003-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3339
[patent_no_of_claims] => 22
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0113/20040113247.pdf
[firstpage_image] =>[orig_patent_app_number] => 10728449
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/728449 | Flip-chip packaging | Dec 4, 2003 | Issued |
Array
(
[id] => 457595
[patent_doc_number] => 07244992
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-07-17
[patent_title] => 'Turn-on-efficient bipolar structures with deep N-well for on-chip ESD protection'
[patent_app_type] => utility
[patent_app_number] => 10/727550
[patent_app_country] => US
[patent_app_date] => 2003-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6923
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/244/07244992.pdf
[firstpage_image] =>[orig_patent_app_number] => 10727550
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/727550 | Turn-on-efficient bipolar structures with deep N-well for on-chip ESD protection | Dec 4, 2003 | Issued |
Array
(
[id] => 7301250
[patent_doc_number] => 20040113227
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-17
[patent_title] => 'Dielectric film, its formation method, semiconductor device using the dielectric film and its production method'
[patent_app_type] => new
[patent_app_number] => 10/726870
[patent_app_country] => US
[patent_app_date] => 2003-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 8535
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 33
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0113/20040113227.pdf
[firstpage_image] =>[orig_patent_app_number] => 10726870
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/726870 | Dielectric film, its formation method, semiconductor device using the dielectric film and its production method | Dec 1, 2003 | Abandoned |
Array
(
[id] => 7140109
[patent_doc_number] => 20050116290
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-02
[patent_title] => 'Planar substrate with selected semiconductor crystal orientations formed by localized amorphization and recrystallization of stacked template layers'
[patent_app_type] => utility
[patent_app_number] => 10/725850
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 5888
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0116/20050116290.pdf
[firstpage_image] =>[orig_patent_app_number] => 10725850
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/725850 | Planar substrate with selected semiconductor crystal orientations formed by localized amorphization and recrystallization of stacked template layers | Dec 1, 2003 | Abandoned |
Array
(
[id] => 7286550
[patent_doc_number] => 20040108596
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-10
[patent_title] => 'Selectable decoupling capacitors for integrated circuit and methods of use'
[patent_app_type] => new
[patent_app_number] => 10/726050
[patent_app_country] => US
[patent_app_date] => 2003-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 8871
[patent_no_of_claims] => 29
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0108/20040108596.pdf
[firstpage_image] =>[orig_patent_app_number] => 10726050
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/726050 | Selectable decoupling capacitors for integrated circuit and methods of use | Dec 1, 2003 | Issued |
Array
(
[id] => 7259844
[patent_doc_number] => 20040149989
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-08-05
[patent_title] => 'Thin film transistor, TFT substrate and liquid crystal display unit'
[patent_app_type] => new
[patent_app_number] => 10/724040
[patent_app_country] => US
[patent_app_date] => 2003-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[pdf_file] => publications/A1/0149/20040149989.pdf
[firstpage_image] =>[orig_patent_app_number] => 10724040
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/724040 | Thin film transistor, TFT substrate and liquid crystal display unit | Nov 30, 2003 | Issued |
Array
(
[id] => 668906
[patent_doc_number] => 07095116
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-08-22
[patent_title] => 'Aluminum-free under bump metallization structure'
[patent_app_type] => utility
[patent_app_number] => 10/726042
[patent_app_country] => US
[patent_app_date] => 2003-12-01
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/095/07095116.pdf
[firstpage_image] =>[orig_patent_app_number] => 10726042
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/726042 | Aluminum-free under bump metallization structure | Nov 30, 2003 | Issued |
Array
(
[id] => 7140126
[patent_doc_number] => 20050116301
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-02
[patent_title] => 'High performance voltage controlled poly resistor for mixed signal and RF applications'
[patent_app_type] => utility
[patent_app_number] => 10/725640
[patent_app_country] => US
[patent_app_date] => 2003-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 2711
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0116/20050116301.pdf
[firstpage_image] =>[orig_patent_app_number] => 10725640
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/725640 | High performance voltage controlled poly resistor for mixed signal and RF applications | Nov 30, 2003 | Abandoned |
Array
(
[id] => 7456280
[patent_doc_number] => 20040119064
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-24
[patent_title] => 'Methods of forming three-dimensional nanodot arrays in a matrix'
[patent_app_type] => new
[patent_app_number] => 10/723842
[patent_app_country] => US
[patent_app_date] => 2003-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 9426
[patent_no_of_claims] => 64
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0119/20040119064.pdf
[firstpage_image] =>[orig_patent_app_number] => 10723842
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/723842 | Methods of forming three-dimensional nanodot arrays in a matrix | Nov 25, 2003 | Issued |