Search

Dao H. Nguyen

Examiner (ID: 14112, Phone: (571)272-1791 , Office: P/2818 )

Most Active Art Unit
2818
Art Unit(s)
2818
Total Applications
2283
Issued Applications
1976
Pending Applications
142
Abandoned Applications
191

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 585840 [patent_doc_number] => 07449728 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-11 [patent_title] => 'Monolithic integrated enhancement mode and depletion mode field effect transistors and method of making the same' [patent_app_type] => utility [patent_app_number] => 10/721437 [patent_app_country] => US [patent_app_date] => 2003-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 9653 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/449/07449728.pdf [firstpage_image] =>[orig_patent_app_number] => 10721437 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/721437
Monolithic integrated enhancement mode and depletion mode field effect transistors and method of making the same Nov 23, 2003 Issued
Array ( [id] => 996830 [patent_doc_number] => 06914272 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-05 [patent_title] => 'Formation of Ohmic contacts in III-nitride light emitting devices' [patent_app_type] => utility [patent_app_number] => 10/721440 [patent_app_country] => US [patent_app_date] => 2003-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3701 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/914/06914272.pdf [firstpage_image] =>[orig_patent_app_number] => 10721440 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/721440
Formation of Ohmic contacts in III-nitride light emitting devices Nov 23, 2003 Issued
Array ( [id] => 7286343 [patent_doc_number] => 20040108517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'Photoelectric detection device and method for its production' [patent_app_type] => new [patent_app_number] => 10/718150 [patent_app_country] => US [patent_app_date] => 2003-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3009 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20040108517.pdf [firstpage_image] =>[orig_patent_app_number] => 10718150 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/718150
Photoelectric detection device and method for its production Nov 19, 2003 Issued
Array ( [id] => 543430 [patent_doc_number] => 07163826 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-16 [patent_title] => 'Method of fabricating multi layer devices on buried oxide layer substrates' [patent_app_type] => utility [patent_app_number] => 10/719663 [patent_app_country] => US [patent_app_date] => 2003-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 100 [patent_no_of_words] => 25236 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/163/07163826.pdf [firstpage_image] =>[orig_patent_app_number] => 10719663 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/719663
Method of fabricating multi layer devices on buried oxide layer substrates Nov 19, 2003 Issued
Array ( [id] => 775991 [patent_doc_number] => 07002831 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-21 [patent_title] => 'Magnetic semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/715448 [patent_app_country] => US [patent_app_date] => 2003-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 37 [patent_no_of_words] => 4374 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/002/07002831.pdf [firstpage_image] =>[orig_patent_app_number] => 10715448 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/715448
Magnetic semiconductor memory device Nov 18, 2003 Issued
Array ( [id] => 386616 [patent_doc_number] => 07303985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-04 [patent_title] => 'Zeolite-carbon doped oxide composite low k dielectric' [patent_app_type] => utility [patent_app_number] => 10/716250 [patent_app_country] => US [patent_app_date] => 2003-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1895 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/303/07303985.pdf [firstpage_image] =>[orig_patent_app_number] => 10716250 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/716250
Zeolite-carbon doped oxide composite low k dielectric Nov 16, 2003 Issued
Array ( [id] => 7101390 [patent_doc_number] => 20050104116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Stacked gate memory cell with erase to gate, array, and method of manufacturing' [patent_app_type] => utility [patent_app_number] => 10/714243 [patent_app_country] => US [patent_app_date] => 2003-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2980 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20050104116.pdf [firstpage_image] =>[orig_patent_app_number] => 10714243 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/714243
Stacked gate memory cell with erase to gate, array, and method of manufacturing Nov 12, 2003 Issued
Array ( [id] => 6903414 [patent_doc_number] => 20050098809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-12 [patent_title] => 'Antiferromagnetic stabilized storage layers in GMRAM storage devices' [patent_app_type] => utility [patent_app_number] => 10/706068 [patent_app_country] => US [patent_app_date] => 2003-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3011 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20050098809.pdf [firstpage_image] =>[orig_patent_app_number] => 10706068 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/706068
Antiferromagnetic stabilized storage layers in GMRAM storage devices Nov 11, 2003 Issued
Array ( [id] => 7318857 [patent_doc_number] => 20040135193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-15 [patent_title] => 'Cell structure of EPROM device and method for fabricating the same' [patent_app_type] => new [patent_app_number] => 10/702350 [patent_app_country] => US [patent_app_date] => 2003-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5043 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20040135193.pdf [firstpage_image] =>[orig_patent_app_number] => 10702350 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/702350
Cell structure of EPROM device and method for fabricating the same Nov 5, 2003 Issued
Array ( [id] => 7318937 [patent_doc_number] => 20040135256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-15 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/696580 [patent_app_country] => US [patent_app_date] => 2003-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3670 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20040135256.pdf [firstpage_image] =>[orig_patent_app_number] => 10696580 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/696580
Nonvolatile semiconductor memory device Oct 29, 2003 Issued
Array ( [id] => 1015003 [patent_doc_number] => 06894347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-17 [patent_title] => 'Power semiconductor element capable of improving short circuit withstand capability while maintaining low on-voltage and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/696040 [patent_app_country] => US [patent_app_date] => 2003-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 89 [patent_no_of_words] => 21808 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/894/06894347.pdf [firstpage_image] =>[orig_patent_app_number] => 10696040 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/696040
Power semiconductor element capable of improving short circuit withstand capability while maintaining low on-voltage and method of fabricating the same Oct 29, 2003 Issued
Array ( [id] => 6987098 [patent_doc_number] => 20050086797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-28 [patent_title] => 'Aluminum heat sink for a solid state relay having ultrasonically welded copper foil' [patent_app_type] => utility [patent_app_number] => 10/692960 [patent_app_country] => US [patent_app_date] => 2003-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2428 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20050086797.pdf [firstpage_image] =>[orig_patent_app_number] => 10692960 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/692960
Aluminum heat sink for a solid state relay having ultrasonically welded copper foil Oct 23, 2003 Abandoned
Array ( [id] => 7162074 [patent_doc_number] => 20050085075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-21 [patent_title] => 'Method and apparatus for thermo-electric cooling' [patent_app_type] => utility [patent_app_number] => 10/688950 [patent_app_country] => US [patent_app_date] => 2003-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2331 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20050085075.pdf [firstpage_image] =>[orig_patent_app_number] => 10688950 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/688950
Method and apparatus for thermo-electric cooling Oct 20, 2003 Issued
Array ( [id] => 7194912 [patent_doc_number] => 20040085708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'One-cylinder stack capacitor and method for fabricating the same' [patent_app_type] => new [patent_app_number] => 10/687838 [patent_app_country] => US [patent_app_date] => 2003-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6683 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20040085708.pdf [firstpage_image] =>[orig_patent_app_number] => 10687838 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/687838
One-cylinder stack capacitor and method for fabricating the same Oct 19, 2003 Issued
Array ( [id] => 7159356 [patent_doc_number] => 20040075111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-22 [patent_title] => 'High performance logic and high density embedded dram with borderless contact and antispacer' [patent_app_type] => new [patent_app_number] => 10/682430 [patent_app_country] => US [patent_app_date] => 2003-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7623 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20040075111.pdf [firstpage_image] =>[orig_patent_app_number] => 10682430 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/682430
High performance logic and high density embedded dram with borderless contact and antispacer Oct 9, 2003 Issued
Array ( [id] => 944342 [patent_doc_number] => 06967396 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-22 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/676050 [patent_app_country] => US [patent_app_date] => 2003-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3988 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/967/06967396.pdf [firstpage_image] =>[orig_patent_app_number] => 10676050 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/676050
Semiconductor device Oct 1, 2003 Issued
Array ( [id] => 1089994 [patent_doc_number] => 06828580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-07 [patent_title] => 'Vertical field effect transistors including conformal monocrystalline silicon layer on trench sidewall' [patent_app_type] => B2 [patent_app_number] => 10/677350 [patent_app_country] => US [patent_app_date] => 2003-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 15 [patent_no_of_words] => 6750 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/828/06828580.pdf [firstpage_image] =>[orig_patent_app_number] => 10677350 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/677350
Vertical field effect transistors including conformal monocrystalline silicon layer on trench sidewall Oct 1, 2003 Issued
Array ( [id] => 7114373 [patent_doc_number] => 20050067673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-31 [patent_title] => 'ADJUSTABLE SELF-ALIGNED AIR GAP DIELECTRIC FOR LOW CAPACITANCE WIRING' [patent_app_type] => utility [patent_app_number] => 10/605440 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3062 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20050067673.pdf [firstpage_image] =>[orig_patent_app_number] => 10605440 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/605440
Adjustable self-aligned air gap dielectric for low capacitance wiring Sep 29, 2003 Issued
Array ( [id] => 7459111 [patent_doc_number] => 20040094771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-20 [patent_title] => 'Device with at least two organic electronic components and method for producing the same' [patent_app_type] => new [patent_app_number] => 10/473050 [patent_app_country] => US [patent_app_date] => 2003-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1474 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 15 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20040094771.pdf [firstpage_image] =>[orig_patent_app_number] => 10473050 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/473050
Device with at least two organic electronic components and method for producing the same Sep 25, 2003 Abandoned
Array ( [id] => 7143957 [patent_doc_number] => 20040169217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-02 [patent_title] => 'Integrated DRAM process/structure using contact pillars' [patent_app_type] => new [patent_app_number] => 10/666336 [patent_app_country] => US [patent_app_date] => 2003-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 12038 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20040169217.pdf [firstpage_image] =>[orig_patent_app_number] => 10666336 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/666336
Integrated DRAM process/structure using contact pillars Sep 16, 2003 Issued
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