
Dao H. Nguyen
Examiner (ID: 14112, Phone: (571)272-1791 , Office: P/2818 )
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2818 |
| Total Applications | 2283 |
| Issued Applications | 1976 |
| Pending Applications | 142 |
| Abandoned Applications | 191 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7280875
[patent_doc_number] => 20040063252
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-04-01
[patent_title] => 'Method of making semiconductor device'
[patent_app_type] => new
[patent_app_number] => 10/663940
[patent_app_country] => US
[patent_app_date] => 2003-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 9489
[patent_no_of_claims] => 6
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[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0063/20040063252.pdf
[firstpage_image] =>[orig_patent_app_number] => 10663940
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/663940 | Method of making semiconductor device | Sep 16, 2003 | Issued |
Array
(
[id] => 7267823
[patent_doc_number] => 20040056341
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-03-25
[patent_title] => 'Semiconductor device, semiconductor package member, and semiconductor device manufacturing method'
[patent_app_type] => new
[patent_app_number] => 10/664150
[patent_app_country] => US
[patent_app_date] => 2003-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
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[pdf_file] => publications/A1/0056/20040056341.pdf
[firstpage_image] =>[orig_patent_app_number] => 10664150
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/664150 | Semiconductor device, semiconductor package member, and semiconductor device manufacturing method | Sep 16, 2003 | Issued |
Array
(
[id] => 775213
[patent_doc_number] => 07002439
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-02-21
[patent_title] => 'Switchable capacitor and method of making the same'
[patent_app_type] => utility
[patent_app_number] => 10/663340
[patent_app_country] => US
[patent_app_date] => 2003-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/002/07002439.pdf
[firstpage_image] =>[orig_patent_app_number] => 10663340
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/663340 | Switchable capacitor and method of making the same | Sep 14, 2003 | Issued |
Array
(
[id] => 7396623
[patent_doc_number] => 20040104402
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-03
[patent_title] => 'Configuration and method for making contact with the back surface of a semiconductor substrate'
[patent_app_type] => new
[patent_app_number] => 10/661340
[patent_app_country] => US
[patent_app_date] => 2003-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 3470
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0104/20040104402.pdf
[firstpage_image] =>[orig_patent_app_number] => 10661340
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/661340 | Configuration and method for making contact with the back surface of a semiconductor substrate | Sep 11, 2003 | Issued |
Array
(
[id] => 7343270
[patent_doc_number] => 20040046208
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-03-11
[patent_title] => 'Polysilicon back-gated SOI MOSFET for dynamic threshold voltage control'
[patent_app_type] => new
[patent_app_number] => 10/659950
[patent_app_country] => US
[patent_app_date] => 2003-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[patent_no_of_words] => 4603
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[pdf_file] => publications/A1/0046/20040046208.pdf
[firstpage_image] =>[orig_patent_app_number] => 10659950
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/659950 | Polysilicon back-gated SOI MOSFET for dynamic threshold voltage control | Sep 10, 2003 | Issued |
Array
(
[id] => 740836
[patent_doc_number] => 07029935
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-04-18
[patent_title] => 'Transmissive optical elements including transparent plastic shell having a phosphor dispersed therein, and methods of fabricating same'
[patent_app_type] => utility
[patent_app_number] => 10/659240
[patent_app_country] => US
[patent_app_date] => 2003-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 19
[patent_no_of_words] => 4375
[patent_no_of_claims] => 9
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/029/07029935.pdf
[firstpage_image] =>[orig_patent_app_number] => 10659240
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/659240 | Transmissive optical elements including transparent plastic shell having a phosphor dispersed therein, and methods of fabricating same | Sep 8, 2003 | Issued |
Array
(
[id] => 814006
[patent_doc_number] => 07414281
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-08-19
[patent_title] => 'Flash memory with high-K dielectric material between substrate and gate'
[patent_app_type] => utility
[patent_app_number] => 10/658936
[patent_app_country] => US
[patent_app_date] => 2003-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 2942
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/414/07414281.pdf
[firstpage_image] =>[orig_patent_app_number] => 10658936
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/658936 | Flash memory with high-K dielectric material between substrate and gate | Sep 8, 2003 | Issued |
Array
(
[id] => 756291
[patent_doc_number] => 07019367
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-03-28
[patent_title] => 'Integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 10/655640
[patent_app_country] => US
[patent_app_date] => 2003-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3598
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/019/07019367.pdf
[firstpage_image] =>[orig_patent_app_number] => 10655640
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/655640 | Integrated circuit | Sep 4, 2003 | Issued |
Array
(
[id] => 738855
[patent_doc_number] => 07034361
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-04-25
[patent_title] => 'Narrow body raised source/drain metal gate MOSFET'
[patent_app_type] => utility
[patent_app_number] => 10/653234
[patent_app_country] => US
[patent_app_date] => 2003-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 2730
[patent_no_of_claims] => 10
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/034/07034361.pdf
[firstpage_image] =>[orig_patent_app_number] => 10653234
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/653234 | Narrow body raised source/drain metal gate MOSFET | Sep 2, 2003 | Issued |
Array
(
[id] => 7191204
[patent_doc_number] => 20050040437
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-24
[patent_title] => 'Cascaded transistors in one well'
[patent_app_type] => utility
[patent_app_number] => 10/653850
[patent_app_country] => US
[patent_app_date] => 2003-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2089
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 4
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0040/20050040437.pdf
[firstpage_image] =>[orig_patent_app_number] => 10653850
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/653850 | Cascaded transistors in one well | Sep 2, 2003 | Abandoned |
Array
(
[id] => 7080581
[patent_doc_number] => 20050045961
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-03
[patent_title] => 'Enhanced gate structure'
[patent_app_type] => utility
[patent_app_number] => 10/652350
[patent_app_country] => US
[patent_app_date] => 2003-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 803
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[pdf_file] => publications/A1/0045/20050045961.pdf
[firstpage_image] =>[orig_patent_app_number] => 10652350
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/652350 | Enhanced gate structure | Aug 28, 2003 | Abandoned |
Array
(
[id] => 7144039
[patent_doc_number] => 20040169268
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-02
[patent_title] => 'Circuit arrangement'
[patent_app_type] => new
[patent_app_number] => 10/649839
[patent_app_country] => US
[patent_app_date] => 2003-08-27
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0169/20040169268.pdf
[firstpage_image] =>[orig_patent_app_number] => 10649839
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/649839 | Circuit arrangement | Aug 26, 2003 | Issued |
Array
(
[id] => 681038
[patent_doc_number] => 07084446
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-08-01
[patent_title] => 'Polymer memory having a ferroelectric polymer memory material with cell sizes that are asymmetric'
[patent_app_type] => utility
[patent_app_number] => 10/648538
[patent_app_country] => US
[patent_app_date] => 2003-08-25
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[pdf_file] => patents/07/084/07084446.pdf
[firstpage_image] =>[orig_patent_app_number] => 10648538
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/648538 | Polymer memory having a ferroelectric polymer memory material with cell sizes that are asymmetric | Aug 24, 2003 | Issued |
Array
(
[id] => 7375735
[patent_doc_number] => 20040178516
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-16
[patent_title] => 'Semiconductor device'
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[pdf_file] => publications/A1/0178/20040178516.pdf
[firstpage_image] =>[orig_patent_app_number] => 10646840
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/646840 | Semiconductor device | Aug 24, 2003 | Abandoned |
Array
(
[id] => 1113942
[patent_doc_number] => 06803725
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-10-12
[patent_title] => 'On-chip vacuum microtube device and method for making such device'
[patent_app_type] => B2
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[firstpage_image] =>[orig_patent_app_number] => 10646600
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/646600 | On-chip vacuum microtube device and method for making such device | Aug 22, 2003 | Issued |
Array
(
[id] => 7629400
[patent_doc_number] => 06818956
[patent_country] => US
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[patent_issue_date] => 2004-11-16
[patent_title] => 'Non-volatile memory device and fabrication method thereof'
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[firstpage_image] =>[orig_patent_app_number] => 10643335
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/643335 | Non-volatile memory device and fabrication method thereof | Aug 14, 2003 | Issued |
Array
(
[id] => 7313607
[patent_doc_number] => 20040033656
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-02-19
[patent_title] => 'Large area, fast frame rate charge coupled device'
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[firstpage_image] =>[orig_patent_app_number] => 10641640
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/641640 | Large area, fast frame rate charge coupled device | Aug 13, 2003 | Issued |
Array
(
[id] => 7394887
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[patent_issue_date] => 2004-02-12
[patent_title] => 'Method for ensuring correct pin assignments between system board connections using common mapping files'
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[firstpage_image] =>[orig_patent_app_number] => 10636903
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/636903 | System for ensuring correct pin assignments between system board connections using common mapping files | Aug 6, 2003 | Issued |
Array
(
[id] => 7310135
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[patent_title] => 'Method of creating shielded structures to protect semiconductor devices'
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[firstpage_image] =>[orig_patent_app_number] => 10637240
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/637240 | Method of creating shielded structures to protect semiconductor devices | Aug 6, 2003 | Issued |
Array
(
[id] => 7368622
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[patent_title] => 'Non-volatile memory capable of preventing antenna effect and fabrication thereof'
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0026/20040026732.pdf
[firstpage_image] =>[orig_patent_app_number] => 10636448
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/636448 | Non-volatile memory capable of preventing antenna effect and fabrication thereof | Aug 5, 2003 | Issued |